ARM: zynq: DT: Sync zc702/zc706/zed/zybo DT with kernel

[karo-tx-uboot.git] / arch / arm / dts / zynq-zed.dts

diff --git a/arch/arm/dts/zynq-zed.dts b/arch/arm/dts/zynq-zed.dts
index 70cc8a6c0d75134c1fda1c701b0cea9c4eea85a8..5762576fea2de490aeb046f9dec16ad48c20f252 100644 (file)
--- a/arch/arm/dts/zynq-zed.dts
+++ b/arch/arm/dts/zynq-zed.dts
@@ -1,7 +1,8 @@
 /*
  * Xilinx ZED board DTS
  *
- * Copyright (C) 2013 Xilinx, Inc.
+ *  Copyright (C) 2011 - 2015 Xilinx
+ *  Copyright (C) 2012 National Instruments Corp.
  *
  * SPDX-License-Identifier:    GPL-2.0+
  */
@@ -9,15 +10,54 @@
 #include "zynq-7000.dtsi"
 
 / {
-       model = "Zynq ZED Board";
+       model = "Zynq Zed Development Board";
        compatible = "xlnx,zynq-zed", "xlnx,zynq-7000";
 
        aliases {
+               ethernet0 = &gem0;
                serial0 = &uart1;
        };
 
        memory {
                device_type = "memory";
-               reg = <0 0x20000000>;
+               reg = <0x0 0x20000000>;
        };
+
+       chosen {
+               bootargs = "earlyprintk";
+               stdout-path = "serial0:115200n8";
+       };
+
+       usb_phy0: phy0 {
+               compatible = "usb-nop-xceiv";
+               #phy-cells = <0>;
+       };
+};
+
+&clkc {
+       ps-clk-frequency = <33333333>;
+};
+
+&gem0 {
+       status = "okay";
+       phy-mode = "rgmii-id";
+       phy-handle = <&ethernet_phy>;
+
+       ethernet_phy: ethernet-phy@0 {
+               reg = <0>;
+       };
+};
+
+&sdhci0 {
+       status = "okay";
+};
+
+&uart1 {
+       status = "okay";
+};
+
+&usb0 {
+       status = "okay";
+       dr_mode = "host";
+       usb-phy = <&usb_phy0>;
 };