#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
+#define DEBUG_TIMER_WRAP
+
/* General purpose timers registers */
struct mxc_gpt {
unsigned int control;
/* General purpose timers bitfields */
#define GPTCR_SWR (1 << 15) /* Software reset */
#define GPTCR_FRR (1 << 9) /* Freerun / restart */
-#define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */
+#define GPTCR_CLKSOURCE_IPG (1 << 6) /* Clock source */
+#define GPTCR_CLKSOURCE_CKIH (2 << 6)
+#define GPTCR_CLKSOURCE_32kHz (4 << 6)
+#ifdef CONFIG_MX6Q
+#define GPTCR_CLKSOURCE_OSC_DIV_8 (5 << 6)
+#define GPTCR_CLKSOURCE_OSC (7 << 6)
+#else
+#define GPTCR_CLKSOURCE_OSC (5 << 6)
+#endif
+#define GPTCR_CLKSOURCE_MASK (7 << 6)
#define GPTCR_TEN 1 /* Timer enable */
+#if 1
+#define GPT_CLKSOURCE GPTCR_CLKSOURCE_OSC
+#define GPT_REFCLK 24000000
+#define GPT_PRESCALER 24
+#else
+#define GPT_CLKSOURCE GPTCR_CLKSOURCE_32kHz
+#define GPT_REFCLK 32768
+#define GPT_PRESCALER 1
+#endif
+#define GPT_CLK (GPT_REFCLK / GPT_PRESCALER)
+
+#ifdef DEBUG_TIMER_WRAP
+/*
+ * Let the timer wrap 30 seconds after start to catch misbehaving
+ * timer related code early
+ */
+#define TIMER_START (-time_to_tick(30 * CONFIG_SYS_HZ))
+#else
+#define TIMER_START 0UL
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp (gd->arch.tbl)
-#define lastinc (gd->arch.lastinc)
+static inline unsigned long tick_to_time(unsigned long tick)
+{
+ unsigned long long t = (unsigned long long)tick * CONFIG_SYS_HZ;
+ do_div(t, GPT_CLK);
+ return t;
+}
-static inline unsigned long long tick_to_time(unsigned long long tick)
+static inline unsigned long time_to_tick(unsigned long time)
{
- tick *= CONFIG_SYS_HZ;
- do_div(tick, MXC_CLK32);
+ unsigned long long ticks = (unsigned long long)time;
- return tick;
+ ticks *= GPT_CLK;
+ do_div(ticks, CONFIG_SYS_HZ);
+ return ticks;
}
-static inline unsigned long long us_to_tick(unsigned long long usec)
+static inline unsigned long us_to_tick(unsigned long usec)
{
- usec = usec * MXC_CLK32 + 999999;
- do_div(usec, 1000000);
+ unsigned long long ticks = (unsigned long long)usec;
- return usec;
+ ticks *= GPT_CLK;
+ do_div(ticks, 1000 * CONFIG_SYS_HZ);
+ return ticks;
}
int timer_init(void)
for (i = 0; i < 100; i++)
__raw_writel(0, &cur_gpt->control);
- __raw_writel(0, &cur_gpt->prescaler); /* 32Khz */
+ __raw_writel(GPT_PRESCALER - 1, &cur_gpt->prescaler);
/* Freerun Mode, PERCLK1 input */
i = __raw_readl(&cur_gpt->control);
- __raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control);
+ i &= ~GPTCR_CLKSOURCE_MASK;
+ __raw_writel(i | GPT_CLKSOURCE | GPTCR_TEN, &cur_gpt->control);
val = __raw_readl(&cur_gpt->counter);
- lastinc = val / (MXC_CLK32 / CONFIG_SYS_HZ);
- timestamp = 0;
+ gd->arch.lastinc = val;
+ gd->arch.tbu = 0;
+ gd->arch.tbl = TIMER_START;
+ gd->arch.timer_rate_hz = GPT_CLK;
return 0;
}
unsigned long long get_ticks(void)
{
ulong now = __raw_readl(&cur_gpt->counter); /* current tick value */
+ ulong inc = now - gd->arch.lastinc;
- if (now >= lastinc) {
- /*
- * normal mode (non roll)
- * move stamp forward with absolut diff ticks
- */
- timestamp += (now - lastinc);
- } else {
- /* we have rollover of incrementer */
- timestamp += (0xFFFFFFFF - lastinc) + now;
- }
- lastinc = now;
- return timestamp;
+ gd->arch.tbl += inc;
+ gd->arch.lastinc = now;
+ return gd->arch.tbl;
}
ulong get_timer_masked(void)
* 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
* 5 * 10^6 days - long enough.
*/
+ /*
+ * LW: get_ticks() returns a long long with the top 32 bits always ZERO!
+ * Thus the calculation above is not true.
+ * A 64bit timer value would only make sense if it was
+ * consistently used throughout the code. Thus also the parameter
+ * to get_timer() and its return value would need to be 64bit wide!
+ */
return tick_to_time(get_ticks());
}
ulong get_timer(ulong base)
{
- return get_timer_masked() - base;
+ return tick_to_time(get_ticks() - time_to_tick(base));
}
+#include <asm/gpio.h>
+
/* delay x useconds AND preserve advance timstamp value */
void __udelay(unsigned long usec)
{
- unsigned long long tmp;
- ulong tmo;
+ unsigned long start = __raw_readl(&cur_gpt->counter);
+ unsigned long ticks;
+
+ if (usec == 0)
+ return;
- tmo = us_to_tick(usec);
- tmp = get_ticks() + tmo; /* get current timestamp */
+ ticks = us_to_tick(usec);
+ if (ticks == 0)
+ ticks++;
- while (get_ticks() < tmp) /* loop till event */
- /*NOP*/;
+ while (__raw_readl(&cur_gpt->counter) - start < ticks)
+ /* loop till event */;
}
/*
*/
ulong get_tbclk(void)
{
- return MXC_CLK32;
+ return gd->arch.timer_rate_hz;
}