armv8/fsl-lsch3: Set nodes in DVM domain

[karo-tx-uboot.git] / arch / arm / include / asm / arch-fsl-lsch3 / config.h

diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h b/arch/arm/include/asm/arch-fsl-lsch3/config.h
index 2d461d93293cbc825cabdcb79ebe315b41da04d8..91214524117dd764ad257304cea6cb2c2a553de1 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-lsch3/config.h
+++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h
@@ -108,6 +108,22 @@
 /* IFC */
 #define CONFIG_SYS_FSL_IFC_LE
 
+/* PCIe */
+#define CONFIG_SYS_PCIE1_ADDR                  (CONFIG_SYS_IMMR + 0x2400000)
+#define CONFIG_SYS_PCIE2_ADDR                  (CONFIG_SYS_IMMR + 0x2500000)
+#define CONFIG_SYS_PCIE3_ADDR                  (CONFIG_SYS_IMMR + 0x2600000)
+#define CONFIG_SYS_PCIE4_ADDR                  (CONFIG_SYS_IMMR + 0x2700000)
+#define CONFIG_SYS_PCIE1_PHYS_ADDR             0x1000000000ULL
+#define CONFIG_SYS_PCIE2_PHYS_ADDR             0x1200000000ULL
+#define CONFIG_SYS_PCIE3_PHYS_ADDR             0x1400000000ULL
+#define CONFIG_SYS_PCIE4_PHYS_ADDR             0x1600000000ULL
+
+/* Cache Coherent Interconnect */
+#define CCI_MN_BASE            0x04000000
+#define CCI_MN_RNF_NODEID_LIST         0x180
+#define CCI_MN_DVM_DOMAIN_CTL          0x200
+#define CCI_MN_DVM_DOMAIN_CTL_SET      0x210
+
 #ifdef CONFIG_LS2085A
 #define CONFIG_MAX_CPUS                                16
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT          8
@@ -119,6 +135,7 @@
 
 #ifdef CONFIG_LS2085A
 #define CONFIG_SYS_FSL_ERRATUM_A008336
+#define CONFIG_SYS_FSL_ERRATUM_A008511
 #define CONFIG_SYS_FSL_ERRATUM_A008514
 #define CONFIG_SYS_FSL_ERRATUM_A008585
 #endif