spi: spi-mxc: add defines for clk inactive state for ECSPI

[karo-tx-uboot.git] / arch / arm / include / asm / arch-mx5 / imx-regs.h

diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
index 4955ccff87e5e02035ba70c728cb3df281abdb07..054c680a5a14ec40304aef6876d72fd8081ac16d 100644 (file)
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -230,9 +230,10 @@
 #define MXC_CSPICTRL_CHAN      18
 
 /* Bit position inside CON register to be associated with SS */
-#define MXC_CSPICON_POL                4
-#define MXC_CSPICON_PHA                0
-#define MXC_CSPICON_SSPOL      12
+#define MXC_CSPICON_PHA                0  /* SCLK phase control */
+#define MXC_CSPICON_POL                4  /* SCLK polarity */
+#define MXC_CSPICON_SSPOL      12 /* SS polarity */
+#define MXC_CSPICON_CTL                20 /* inactive state of SCLK */
 #define MXC_SPI_BASE_ADDRESSES \
        CSPI1_BASE_ADDR, \
        CSPI2_BASE_ADDR, \