mx6: imx-regs: Remove unused 'omux' field from iomux struct

[karo-tx-uboot.git] / arch / arm / include / asm / arch-mx6 / imx-regs.h

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index df87123ad3e4b80521f70ef609c659d46227057b..d4ce8a8733083bd80bc7b74b6cc35495c2b23a22 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -348,6 +348,8 @@ struct src {
 /* GPR1 bitfields */
 #define IOMUXC_GPR1_ENET_CLK_SEL_OFFSET                21
 #define IOMUXC_GPR1_ENET_CLK_SEL_MASK          (1 << IOMUXC_GPR1_ENET_CLK_SEL_OFFSET)
+#define IOMUXC_GPR1_USB_OTG_ID_OFFSET          13
+#define IOMUXC_GPR1_USB_OTG_ID_SEL_MASK                (1 << IOMUXC_GPR1_USB_OTG_ID_OFFSET)
 
 /* GPR3 bitfields */
 #define IOMUXC_GPR3_GPU_DBG_OFFSET             29
@@ -398,9 +400,10 @@ struct src {
 
 
 struct iomuxc {
+#ifdef CONFIG_MX6SX
+       u8 reserved[0x4000];
+#endif
        u32 gpr[14];
-       u32 omux[5];
-       /* mux and pad registers */
 };
 
 #define IOMUXC_GPR2_COUNTER_RESET_VAL_OFFSET           20
@@ -500,6 +503,7 @@ struct cspi_regs {
 #define MXC_CSPICTRL_RXOVF     (1 << 6)
 #define MXC_CSPIPERIOD_32KHZ   (1 << 15)
 #define MAX_SPI_BYTES  32
+#define SPI_MAX_NUM    4
 
 /* Bit position inside CTRL register to be associated with SS */
 #define MXC_CSPICTRL_CHAN      18
@@ -764,15 +768,6 @@ struct anatop_regs {
 #define ANATOP_PFD_CLKGATE_SHIFT(n)    (7+((n)*8))
 #define ANATOP_PFD_CLKGATE_MASK(n)     (1<<ANATOP_PFD_CLKGATE_SHIFT(n))
 
-struct iomuxc_base_regs {
-       u32     gpr[14];        /* 0x000 */
-       u32     obsrv[5];       /* 0x038 */
-       u32     swmux_ctl[197]; /* 0x04c */
-       u32     swpad_ctl[250]; /* 0x360 */
-       u32     swgrp[26];      /* 0x748 */
-       u32     daisy[104];     /* 0x7b0..94c */
-};
-
 struct wdog_regs {
        u16     wcr;    /* Control */
        u16     wsr;    /* Service */
@@ -781,5 +776,21 @@ struct wdog_regs {
        u16     wmcr;   /* Miscellaneous Control */
 };
 
+#define PWMCR_PRESCALER(x)     (((x - 1) & 0xFFF) << 4)
+#define PWMCR_DOZEEN           (1 << 24)
+#define PWMCR_WAITEN           (1 << 23)
+#define PWMCR_DBGEN            (1 << 22)
+#define PWMCR_CLKSRC_IPG_HIGH  (2 << 16)
+#define PWMCR_CLKSRC_IPG       (1 << 16)
+#define PWMCR_EN               (1 << 0)
+
+struct pwm_regs {
+       u32     cr;
+       u32     sr;
+       u32     ir;
+       u32     sar;
+       u32     pr;
+       u32     cnr;
+};
 #endif /* __ASSEMBLER__*/
 #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */