u16 val;
-} __attribute__ ((__packed__));
+};
#ifdef CONFIG_OFF_PADCONF
#define OFF_PD (1 << 12)
#define CORE_REVISION 0x0000
#define CORE_HWINFO 0x0004
#define CORE_SYSCONFIG 0x0010
-#define GPMC_AD0 0x0040
-#define GPMC_AD1 0x0042
-#define GPMC_AD2 0x0044
-#define GPMC_AD3 0x0046
-#define GPMC_AD4 0x0048
-#define GPMC_AD5 0x004A
-#define GPMC_AD6 0x004C
-#define GPMC_AD7 0x004E
-#define GPMC_AD8 0x0050
-#define GPMC_AD9 0x0052
-#define GPMC_AD10 0x0054
-#define GPMC_AD11 0x0056
-#define GPMC_AD12 0x0058
-#define GPMC_AD13 0x005A
-#define GPMC_AD14 0x005C
-#define GPMC_AD15 0x005E
-#define GPMC_A16 0x0060
-#define GPMC_A17 0x0062
-#define GPMC_A18 0x0064
-#define GPMC_A19 0x0066
-#define GPMC_A20 0x0068
-#define GPMC_A21 0x006A
-#define GPMC_A22 0x006C
-#define GPMC_A23 0x006E
-#define GPMC_A24 0x0070
-#define GPMC_A25 0x0072
-#define GPMC_NCS0 0x0074
-#define GPMC_NCS1 0x0076
-#define GPMC_NCS2 0x0078
-#define GPMC_NCS3 0x007A
-#define GPMC_NWP 0x007C
-#define GPMC_CLK 0x007E
-#define GPMC_NADV_ALE 0x0080
-#define GPMC_NOE 0x0082
-#define GPMC_NWE 0x0084
-#define GPMC_NBE0_CLE 0x0086
-#define GPMC_NBE1 0x0088
-#define GPMC_WAIT0 0x008A
-#define GPMC_WAIT1 0x008C
-#define C2C_DATA11 0x008E
-#define C2C_DATA12 0x0090
-#define C2C_DATA13 0x0092
-#define C2C_DATA14 0x0094
-#define C2C_DATA15 0x0096
-#define HDMI_HPD 0x0098
-#define HDMI_CEC 0x009A
-#define HDMI_DDC_SCL 0x009C
-#define HDMI_DDC_SDA 0x009E
-#define CSI21_DX0 0x00A0
-#define CSI21_DY0 0x00A2
-#define CSI21_DX1 0x00A4
-#define CSI21_DY1 0x00A6
-#define CSI21_DX2 0x00A8
-#define CSI21_DY2 0x00AA
-#define CSI21_DX3 0x00AC
-#define CSI21_DY3 0x00AE
-#define CSI21_DX4 0x00B0
-#define CSI21_DY4 0x00B2
-#define CSI22_DX0 0x00B4
-#define CSI22_DY0 0x00B6
-#define CSI22_DX1 0x00B8
-#define CSI22_DY1 0x00BA
-#define CAM_SHUTTER 0x00BC
-#define CAM_STROBE 0x00BE
-#define CAM_GLOBALRESET 0x00C0
-#define USBB1_ULPITLL_CLK 0x00C2
-#define USBB1_ULPITLL_STP 0x00C4
-#define USBB1_ULPITLL_DIR 0x00C6
-#define USBB1_ULPITLL_NXT 0x00C8
-#define USBB1_ULPITLL_DAT0 0x00CA
-#define USBB1_ULPITLL_DAT1 0x00CC
-#define USBB1_ULPITLL_DAT2 0x00CE
-#define USBB1_ULPITLL_DAT3 0x00D0
-#define USBB1_ULPITLL_DAT4 0x00D2
-#define USBB1_ULPITLL_DAT5 0x00D4
-#define USBB1_ULPITLL_DAT6 0x00D6
-#define USBB1_ULPITLL_DAT7 0x00D8
-#define USBB1_HSIC_DATA 0x00DA
-#define USBB1_HSIC_STROBE 0x00DC
-#define USBC1_ICUSB_DP 0x00DE
-#define USBC1_ICUSB_DM 0x00E0
-#define SDMMC1_CLK 0x00E2
-#define SDMMC1_CMD 0x00E4
-#define SDMMC1_DAT0 0x00E6
-#define SDMMC1_DAT1 0x00E8
-#define SDMMC1_DAT2 0x00EA
-#define SDMMC1_DAT3 0x00EC
-#define SDMMC1_DAT4 0x00EE
-#define SDMMC1_DAT5 0x00F0
-#define SDMMC1_DAT6 0x00F2
-#define SDMMC1_DAT7 0x00F4
-#define ABE_MCBSP2_CLKX 0x00F6
-#define ABE_MCBSP2_DR 0x00F8
-#define ABE_MCBSP2_DX 0x00FA
-#define ABE_MCBSP2_FSX 0x00FC
-#define ABE_MCBSP1_CLKX 0x00FE
-#define ABE_MCBSP1_DR 0x0100
-#define ABE_MCBSP1_DX 0x0102
-#define ABE_MCBSP1_FSX 0x0104
-#define ABE_PDM_UL_DATA 0x0106
-#define ABE_PDM_DL_DATA 0x0108
-#define ABE_PDM_FRAME 0x010A
-#define ABE_PDM_LB_CLK 0x010C
-#define ABE_CLKS 0x010E
-#define ABE_DMIC_CLK1 0x0110
-#define ABE_DMIC_DIN1 0x0112
-#define ABE_DMIC_DIN2 0x0114
-#define ABE_DMIC_DIN3 0x0116
-#define UART2_CTS 0x0118
-#define UART2_RTS 0x011A
-#define UART2_RX 0x011C
-#define UART2_TX 0x011E
-#define HDQ_SIO 0x0120
-#define I2C1_SCL 0x0122
-#define I2C1_SDA 0x0124
-#define I2C2_SCL 0x0126
-#define I2C2_SDA 0x0128
-#define I2C3_SCL 0x012A
-#define I2C3_SDA 0x012C
-#define I2C4_SCL 0x012E
-#define I2C4_SDA 0x0130
-#define MCSPI1_CLK 0x0132
-#define MCSPI1_SOMI 0x0134
-#define MCSPI1_SIMO 0x0136
-#define MCSPI1_CS0 0x0138
-#define MCSPI1_CS1 0x013A
-#define MCSPI1_CS2 0x013C
-#define MCSPI1_CS3 0x013E
-#define UART3_CTS_RCTX 0x0140
-#define UART3_RTS_SD 0x0142
-#define UART3_RX_IRRX 0x0144
-#define UART3_TX_IRTX 0x0146
-#define SDMMC5_CLK 0x0148
-#define SDMMC5_CMD 0x014A
-#define SDMMC5_DAT0 0x014C
-#define SDMMC5_DAT1 0x014E
-#define SDMMC5_DAT2 0x0150
-#define SDMMC5_DAT3 0x0152
-#define MCSPI4_CLK 0x0154
-#define MCSPI4_SIMO 0x0156
-#define MCSPI4_SOMI 0x0158
-#define MCSPI4_CS0 0x015A
-#define UART4_RX 0x015C
-#define UART4_TX 0x015E
-#define USBB2_ULPITLL_CLK 0x0160
-#define USBB2_ULPITLL_STP 0x0162
-#define USBB2_ULPITLL_DIR 0x0164
-#define USBB2_ULPITLL_NXT 0x0166
-#define USBB2_ULPITLL_DAT0 0x0168
-#define USBB2_ULPITLL_DAT1 0x016A
-#define USBB2_ULPITLL_DAT2 0x016C
-#define USBB2_ULPITLL_DAT3 0x016E
-#define USBB2_ULPITLL_DAT4 0x0170
-#define USBB2_ULPITLL_DAT5 0x0172
-#define USBB2_ULPITLL_DAT6 0x0174
-#define USBB2_ULPITLL_DAT7 0x0176
-#define USBB2_HSIC_DATA 0x0178
-#define USBB2_HSIC_STROBE 0x017A
-#define UNIPRO_TX0 0x017C
-#define UNIPRO_TY0 0x017E
-#define UNIPRO_TX1 0x0180
-#define UNIPRO_TY1 0x0182
-#define UNIPRO_TX2 0x0184
-#define UNIPRO_TY2 0x0186
-#define UNIPRO_RX0 0x0188
-#define UNIPRO_RY0 0x018A
-#define UNIPRO_RX1 0x018C
-#define UNIPRO_RY1 0x018E
-#define UNIPRO_RX2 0x0190
-#define UNIPRO_RY2 0x0192
-#define USBA0_OTG_CE 0x0194
-#define USBA0_OTG_DP 0x0196
-#define USBA0_OTG_DM 0x0198
-#define FREF_CLK1_OUT 0x019A
-#define FREF_CLK2_OUT 0x019C
-#define SYS_NIRQ1 0x019E
-#define SYS_NIRQ2 0x01A0
-#define SYS_BOOT0 0x01A2
-#define SYS_BOOT1 0x01A4
-#define SYS_BOOT2 0x01A6
-#define SYS_BOOT3 0x01A8
-#define SYS_BOOT4 0x01AA
-#define SYS_BOOT5 0x01AC
-#define DPM_EMU0 0x01AE
-#define DPM_EMU1 0x01B0
-#define DPM_EMU2 0x01B2
-#define DPM_EMU3 0x01B4
-#define DPM_EMU4 0x01B6
-#define DPM_EMU5 0x01B8
-#define DPM_EMU6 0x01BA
-#define DPM_EMU7 0x01BC
-#define DPM_EMU8 0x01BE
-#define DPM_EMU9 0x01C0
-#define DPM_EMU10 0x01C2
-#define DPM_EMU11 0x01C4
-#define DPM_EMU12 0x01C6
-#define DPM_EMU13 0x01C8
-#define DPM_EMU14 0x01CA
-#define DPM_EMU15 0x01CC
-#define DPM_EMU16 0x01CE
-#define DPM_EMU17 0x01D0
-#define DPM_EMU18 0x01D2
-#define DPM_EMU19 0x01D4
-#define WAKEUPEVENT_0 0x01D8
-#define WAKEUPEVENT_1 0x01DC
-#define WAKEUPEVENT_2 0x01E0
-#define WAKEUPEVENT_3 0x01E4
-#define WAKEUPEVENT_4 0x01E8
-#define WAKEUPEVENT_5 0x01EC
-#define WAKEUPEVENT_6 0x01F0
+#define EMMC_CLK 0x0040
+#define EMMC_CMD 0x0042
+#define EMMC_DATA0 0x0044
+#define EMMC_DATA1 0x0046
+#define EMMC_DATA2 0x0048
+#define EMMC_DATA3 0x004a
+#define EMMC_DATA4 0x004c
+#define EMMC_DATA5 0x004e
+#define EMMC_DATA6 0x0050
+#define EMMC_DATA7 0x0052
+#define C2C_CLKOUT0 0x0054
+#define C2C_CLKOUT1 0x0056
+#define C2C_CLKIN0 0x0058
+#define C2C_CLKIN1 0x005a
+#define C2C_DATAIN0 0x005c
+#define C2C_DATAIN1 0x005e
+#define C2C_DATAIN2 0x0060
+#define C2C_DATAIN3 0x0062
+#define C2C_DATAIN4 0x0064
+#define C2C_DATAIN5 0x0066
+#define C2C_DATAIN6 0x0068
+#define C2C_DATAIN7 0x006a
+#define C2C_DATAOUT0 0x006c
+#define C2C_DATAOUT1 0x006e
+#define C2C_DATAOUT2 0x0070
+#define C2C_DATAOUT3 0x0072
+#define C2C_DATAOUT4 0x0074
+#define C2C_DATAOUT5 0x0076
+#define C2C_DATAOUT6 0x0078
+#define C2C_DATAOUT7 0x007a
+#define C2C_DATA8 0x007c
+#define C2C_DATA9 0x007e
+#define C2C_DATA10 0x0080
+#define C2C_DATA11 0x0082
+#define C2C_DATA12 0x0084
+#define C2C_DATA13 0x0086
+#define C2C_DATA14 0x0088
+#define C2C_DATA15 0x008a
+#define LLIA_WAKEREQOUT 0x008c
+#define LLIB_WAKEREQOUT 0x008e
+#define HSI1_ACREADY 0x0090
+#define HSI1_CAREADY 0x0092
+#define HSI1_ACWAKE 0x0094
+#define HSI1_CAWAKE 0x0096
+#define HSI1_ACFLAG 0x0098
+#define HSI1_ACDATA 0x009a
+#define HSI1_CAFLAG 0x009c
+#define HSI1_CADATA 0x009e
+#define UART1_TX 0x00a0
+#define UART1_CTS 0x00a2
+#define UART1_RX 0x00a4
+#define UART1_RTS 0x00a6
+#define HSI2_CAREADY 0x00a8
+#define HSI2_ACREADY 0x00aa
+#define HSI2_CAWAKE 0x00ac
+#define HSI2_ACWAKE 0x00ae
+#define HSI2_CAFLAG 0x00b0
+#define HSI2_CADATA 0x00b2
+#define HSI2_ACFLAG 0x00b4
+#define HSI2_ACDATA 0x00b6
+#define UART2_RTS 0x00b8
+#define UART2_CTS 0x00ba
+#define UART2_RX 0x00bc
+#define UART2_TX 0x00be
+#define USBB1_HSIC_STROBE 0x00c0
+#define USBB1_HSIC_DATA 0x00c2
+#define USBB2_HSIC_STROBE 0x00c4
+#define USBB2_HSIC_DATA 0x00c6
+#define TIMER10_PWM_EVT 0x00c8
+#define DSIPORTA_TE0 0x00ca
+#define DSIPORTA_LANE0X 0x00cc
+#define DSIPORTA_LANE0Y 0x00ce
+#define DSIPORTA_LANE1X 0x00d0
+#define DSIPORTA_LANE1Y 0x00d2
+#define DSIPORTA_LANE2X 0x00d4
+#define DSIPORTA_LANE2Y 0x00d6
+#define DSIPORTA_LANE3X 0x00d8
+#define DSIPORTA_LANE3Y 0x00da
+#define DSIPORTA_LANE4X 0x00dc
+#define DSIPORTA_LANE4Y 0x00de
+#define DSIPORTC_LANE0X 0x00e0
+#define DSIPORTC_LANE0Y 0x00e2
+#define DSIPORTC_LANE1X 0x00e4
+#define DSIPORTC_LANE1Y 0x00e6
+#define DSIPORTC_LANE2X 0x00e8
+#define DSIPORTC_LANE2Y 0x00ea
+#define DSIPORTC_LANE3X 0x00ec
+#define DSIPORTC_LANE3Y 0x00ee
+#define DSIPORTC_LANE4X 0x00f0
+#define DSIPORTC_LANE4Y 0x00f2
+#define DSIPORTC_TE0 0x00f4
+#define TIMER9_PWM_EVT 0x00f6
+#define I2C4_SCL 0x00f8
+#define I2C4_SDA 0x00fa
+#define MCSPI2_CLK 0x00fc
+#define MCSPI2_SIMO 0x00fe
+#define MCSPI2_SOMI 0x0100
+#define MCSPI2_CS0 0x0102
+#define RFBI_DATA15 0x0104
+#define RFBI_DATA14 0x0106
+#define RFBI_DATA13 0x0108
+#define RFBI_DATA12 0x010a
+#define RFBI_DATA11 0x010c
+#define RFBI_DATA10 0x010e
+#define RFBI_DATA9 0x0110
+#define RFBI_DATA8 0x0112
+#define RFBI_DATA7 0x0114
+#define RFBI_DATA6 0x0116
+#define RFBI_DATA5 0x0118
+#define RFBI_DATA4 0x011a
+#define RFBI_DATA3 0x011c
+#define RFBI_DATA2 0x011e
+#define RFBI_DATA1 0x0120
+#define RFBI_DATA0 0x0122
+#define RFBI_WE 0x0124
+#define RFBI_CS0 0x0126
+#define RFBI_A0 0x0128
+#define RFBI_RE 0x012a
+#define RFBI_HSYNC0 0x012c
+#define RFBI_TE_VSYNC0 0x012e
+#define GPIO6_182 0x0130
+#define GPIO6_183 0x0132
+#define GPIO6_184 0x0134
+#define GPIO6_185 0x0136
+#define GPIO6_186 0x0138
+#define GPIO6_187 0x013a
+#define HDMI_CEC 0x013c
+#define HDMI_HPD 0x013e
+#define HDMI_DDC_SCL 0x0140
+#define HDMI_DDC_SDA 0x0142
+#define CSIPORTC_LANE0X 0x0144
+#define CSIPORTC_LANE0Y 0x0146
+#define CSIPORTC_LANE1X 0x0148
+#define CSIPORTC_LANE1Y 0x014a
+#define CSIPORTB_LANE0X 0x014c
+#define CSIPORTB_LANE0Y 0x014e
+#define CSIPORTB_LANE1X 0x0150
+#define CSIPORTB_LANE1Y 0x0152
+#define CSIPORTB_LANE2X 0x0154
+#define CSIPORTB_LANE2Y 0x0156
+#define CSIPORTA_LANE0X 0x0158
+#define CSIPORTA_LANE0Y 0x015a
+#define CSIPORTA_LANE1X 0x015c
+#define CSIPORTA_LANE1Y 0x015e
+#define CSIPORTA_LANE2X 0x0160
+#define CSIPORTA_LANE2Y 0x0162
+#define CSIPORTA_LANE3X 0x0164
+#define CSIPORTA_LANE3Y 0x0166
+#define CSIPORTA_LANE4X 0x0168
+#define CSIPORTA_LANE4Y 0x016a
+#define CAM_SHUTTER 0x016c
+#define CAM_STROBE 0x016e
+#define CAM_GLOBALRESET 0x0170
+#define TIMER11_PWM_EVT 0x0172
+#define TIMER5_PWM_EVT 0x0174
+#define TIMER6_PWM_EVT 0x0176
+#define TIMER8_PWM_EVT 0x0178
+#define I2C3_SCL 0x017a
+#define I2C3_SDA 0x017c
+#define GPIO8_233 0x017e
+#define GPIO8_234 0x0180
+#define ABE_CLKS 0x0182
+#define ABEDMIC_DIN1 0x0184
+#define ABEDMIC_DIN2 0x0186
+#define ABEDMIC_DIN3 0x0188
+#define ABEDMIC_CLK1 0x018a
+#define ABEDMIC_CLK2 0x018c
+#define ABEDMIC_CLK3 0x018e
+#define ABESLIMBUS1_CLOCK 0x0190
+#define ABESLIMBUS1_DATA 0x0192
+#define ABEMCBSP2_DR 0x0194
+#define ABEMCBSP2_DX 0x0196
+#define ABEMCBSP2_FSX 0x0198
+#define ABEMCBSP2_CLKX 0x019a
+#define ABEMCPDM_UL_DATA 0x019c
+#define ABEMCPDM_DL_DATA 0x019e
+#define ABEMCPDM_FRAME 0x01a0
+#define ABEMCPDM_LB_CLK 0x01a2
+#define WLSDIO_CLK 0x01a4
+#define WLSDIO_CMD 0x01a6
+#define WLSDIO_DATA0 0x01a8
+#define WLSDIO_DATA1 0x01aa
+#define WLSDIO_DATA2 0x01ac
+#define WLSDIO_DATA3 0x01ae
+#define UART5_RX 0x01b0
+#define UART5_TX 0x01b2
+#define UART5_CTS 0x01b4
+#define UART5_RTS 0x01b6
+#define I2C2_SCL 0x01b8
+#define I2C2_SDA 0x01ba
+#define MCSPI1_CLK 0x01bc
+#define MCSPI1_SOMI 0x01be
+#define MCSPI1_SIMO 0x01c0
+#define MCSPI1_CS0 0x01c2
+#define MCSPI1_CS1 0x01c4
+#define I2C5_SCL 0x01c6
+#define I2C5_SDA 0x01c8
+#define PERSLIMBUS2_CLOCK 0x01ca
+#define PERSLIMBUS2_DATA 0x01cc
+#define UART6_TX 0x01ce
+#define UART6_RX 0x01d0
+#define UART6_CTS 0x01d2
+#define UART6_RTS 0x01d4
+#define UART3_CTS_RCTX 0x01d6
+#define UART3_RTS_IRSD 0x01d8
+#define UART3_TX_IRTX 0x01da
+#define UART3_RX_IRRX 0x01dc
+#define USBB3_HSIC_STROBE 0x01de
+#define USBB3_HSIC_DATA 0x01e0
+#define SDCARD_CLK 0x01e2
+#define SDCARD_CMD 0x01e4
+#define SDCARD_DATA2 0x01e6
+#define SDCARD_DATA3 0x01e8
+#define SDCARD_DATA0 0x01ea
+#define SDCARD_DATA1 0x01ec
+#define USBD0_HS_DP 0x01ee
+#define USBD0_HS_DM 0x01f0
+#define I2C1_PMIC_SCL 0x01f2
+#define I2C1_PMIC_SDA 0x01f4
+#define USBD0_SS_RX 0x01f6
-#define WKUP_REVISION 0x0000
-#define WKUP_HWINFO 0x0004
-#define WKUP_SYSCONFIG 0x0010
-#define PAD0_SIM_IO 0x0040
-#define PAD1_SIM_CLK 0x0042
-#define PAD0_SIM_RESET 0x0044
-#define PAD1_SIM_CD 0x0046
-#define PAD0_SIM_PWRCTRL 0x0048
-#define PAD1_SR_SCL 0x004A
-#define PAD0_SR_SDA 0x004C
-#define PAD1_FREF_XTAL_IN 0x004E
-#define PAD0_FREF_SLICER_IN 0x0050
-#define PAD1_FREF_CLK_IOREQ 0x0052
-#define PAD0_FREF_CLK0_OUT 0x0054
-#define PAD1_FREF_CLK3_REQ 0x0056
-#define PAD0_FREF_CLK3_OUT 0x0058
-#define PAD1_FREF_CLK4_REQ 0x005A
-#define PAD0_FREF_CLK4_OUT 0x005C
-#define PAD1_SYS_32K 0x005E
-#define PAD0_SYS_NRESPWRON 0x0060
-#define PAD1_SYS_NRESWARM 0x0062
-#define PAD0_SYS_PWR_REQ 0x0064
-#define PAD1_SYS_PWRON_RESET 0x0066
-#define PAD0_SYS_BOOT6 0x0068
-#define PAD1_SYS_BOOT7 0x006A
-#define PAD0_JTAG_NTRST 0x006C
-#define PAD1_JTAG_TCK 0x006D
-#define PAD0_JTAG_RTCK 0x0070
-#define PAD1_JTAG_TMS_TMSC 0x0072
-#define PAD0_JTAG_TDI 0x0074
-#define PAD1_JTAG_TDO 0x0076
-#define PADCONF_WAKEUPEVENT_0 0x007C
-#define CONTROL_SMART1NOPMIO_PADCONF_0 0x05A0
-#define CONTROL_SMART1NOPMIO_PADCONF_1 0x05A4
-#define PADCONF_MODE 0x05A8
-#define CONTROL_XTAL_OSCILLATOR 0x05AC
-#define CONTROL_CONTROL_I2C_2 0x0604
-#define CONTROL_CONTROL_JTAG 0x0608
-#define CONTROL_CONTROL_SYS 0x060C
-#define CONTROL_SPARE_RW 0x0614
-#define CONTROL_SPARE_R 0x0618
-#define CONTROL_SPARE_R_C0 0x061C
+#define LLIA_WAKEREQIN 0x0040
+#define LLIB_WAKEREQIN 0x0042
+#define DRM_EMU0 0x0044
+#define DRM_EMU1 0x0046
+#define JTAG_NTRST 0x0048
+#define JTAG_TCK 0x004a
+#define JTAG_RTCK 0x004c
+#define JTAG_TMSC 0x004e
+#define JTAG_TDI 0x0050
+#define JTAG_TDO 0x0052
+#define SYS_32K 0x0054
+#define FREF_CLK_IOREQ 0x0056
+#define FREF_CLK0_OUT 0x0058
+#define FREF_CLK1_OUT 0x005a
+#define FREF_CLK2_OUT 0x005c
+#define FREF_CLK2_REQ 0x005e
+#define FREF_CLK1_REQ 0x0060
+#define SYS_NRESPWRON 0x0062
+#define SYS_NRESWARM 0x0064
+#define SYS_PWR_REQ 0x0066
+#define SYS_NIRQ1 0x0068
+#define SYS_NIRQ2 0x006a
+#define SR_PMIC_SCL 0x006c
+#define SR_PMIC_SDA 0x006e
+#define SYS_BOOT0 0x0070
+#define SYS_BOOT1 0x0072
+#define SYS_BOOT2 0x0074
+#define SYS_BOOT3 0x0076
+#define SYS_BOOT4 0x0078
+#define SYS_BOOT5 0x007a
#endif /* _MUX_OMAP5_H_ */
projects / karo-tx-uboot.git / blobdiff