#define ZYNQ_SERIAL_BASEADDR0 0xFF000000
#define ZYNQ_SERIAL_BASEADDR1 0xFF001000
+#define ZYNQ_GEM_BASEADDR0 0xFF0B0000
+#define ZYNQ_GEM_BASEADDR1 0xFF0C0000
+#define ZYNQ_GEM_BASEADDR2 0xFF0D0000
+#define ZYNQ_GEM_BASEADDR3 0xFF0E0000
+
#define ZYNQ_SPI_BASEADDR0 0xFF040000
#define ZYNQ_SPI_BASEADDR1 0xFF050000
#define ZYNQ_SDHCI_BASEADDR0 0xFF160000
#define ZYNQ_SDHCI_BASEADDR1 0xFF170000
+#define ZYNQMP_SATA_BASEADDR 0xFD0C0000
+
+#define ZYNQMP_USB0_XHCI_BASEADDR 0xFE200000
+#define ZYNQMP_USB1_XHCI_BASEADDR 0xFE300000
+
#define ZYNQMP_CRL_APB_BASEADDR 0xFF5E0000
#define ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT 0x1000000
#define crlapb_base ((struct crlapb_regs *)ZYNQMP_CRL_APB_BASEADDR)
+#if defined(CONFIG_SECURE_IOU)
+#define ZYNQMP_IOU_SCNTR 0xFF260000
+#else
#define ZYNQMP_IOU_SCNTR 0xFF250000
+#endif
#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN 0x1
#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG 0x2