Pull utrace into release branch

[mv-sheeva.git] / arch / arm / lib / testchangebit.S

diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S
index 4aba4676b984c9915ed12125a6b0cd27217c107a..5c98dc567f0fc7b3ecad15acefd58538d983c124 100644 (file)
--- a/arch/arm/lib/testchangebit.S
+++ b/arch/arm/lib/testchangebit.S
@@ -9,21 +9,12 @@
  */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include "bitops.h"
                 .text
 
 ENTRY(_test_and_change_bit_be)
                eor     r0, r0, #0x18           @ big endian byte ordering
 ENTRY(_test_and_change_bit_le)
-               add     r1, r1, r0, lsr #3
-               and     r3, r0, #7
-               mov     r0, #1
-               save_and_disable_irqs ip, r2
-               ldrb    r2, [r1]
-               tst     r2, r0, lsl r3
-               eor     r2, r2, r0, lsl r3
-               strb    r2, [r1]
-               restore_irqs ip
-               moveq   r0, #0
-               RETINSTR(mov,pc,lr)
-
-
+       testop  eor, strb
+ENDPROC(_test_and_change_bit_be)
+ENDPROC(_test_and_change_bit_le)