ENGR00240987: ARM: imx6q: initialize clocks for IPU

[karo-tx-linux.git] / arch / arm / mach-imx / clk-imx6q.c

diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 2b4d6acfa34abdd67a6c6ed9becb44345dd17929..c05b3952376697b4689c0604845a10d9bea242df 100644 (file)
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -107,7 +107,7 @@ enum mx6q_clks {
        sata_ref, sata_ref_100m, pcie_ref, pcie_ref_125m, enet_ref, usbphy1_gate,
        usbphy2_gate, pll4_post_div, pll5_post_div, pll5_video_div, eim_slow,
        spdif, cko2_sel, cko2_podf, cko2, cko, vdoa, pll4_audio_div,
-       lvds1_sel, lvds2_sel, lvds1_gate, lvds2_gate, clk_max
+       lvds1_sel, lvds2_sel, lvds1_gate, lvds2_gate, esai_ahb, clk_max
 };
 
 static struct clk *clk[clk_max];
@@ -140,11 +140,13 @@ static struct clk_div_table video_div_table[] = {
        { /* sentinel */ }
 };
 
+static unsigned int share_count_esai;
+
 static void __init imx6q_clocks_init(struct device_node *ccm_node)
 {
        struct device_node *np;
        void __iomem *base;
-       int i, irq;
+       int i;
        int ret;
 
        clk[dummy] = imx_clk_fixed("dummy", 0);
@@ -352,9 +354,14 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
        clk[ecspi2]       = imx_clk_gate2("ecspi2",        "ecspi_root",        base + 0x6c, 2);
        clk[ecspi3]       = imx_clk_gate2("ecspi3",        "ecspi_root",        base + 0x6c, 4);
        clk[ecspi4]       = imx_clk_gate2("ecspi4",        "ecspi_root",        base + 0x6c, 6);
-       clk[ecspi5]       = imx_clk_gate2("ecspi5",        "ecspi_root",        base + 0x6c, 8);
+       if (cpu_is_imx6dl())
+               /* ecspi5 is replaced with i2c4 on imx6dl & imx6s */
+               clk[ecspi5] = imx_clk_gate2("i2c4",        "ipg_per",           base + 0x6c, 8);
+       else
+               clk[ecspi5] = imx_clk_gate2("ecspi5",      "ecspi_root",        base + 0x6c, 8);
        clk[enet]         = imx_clk_gate2("enet",          "ipg",               base + 0x6c, 10);
-       clk[esai]         = imx_clk_gate2("esai",          "esai_podf",         base + 0x6c, 16);
+       clk[esai]         = imx_clk_gate2_shared("esai",   "esai_podf",         base + 0x6c, 16, &share_count_esai);
+       clk[esai_ahb]     = imx_clk_gate2_shared("esai_ahb", "ahb",             base + 0x6c, 16, &share_count_esai);
        clk[gpt_ipg]      = imx_clk_gate2("gpt_ipg",       "ipg",               base + 0x6c, 20);
        clk[gpt_ipg_per]  = imx_clk_gate2("gpt_ipg_per",   "ipg_per",           base + 0x6c, 22);
        if (cpu_is_imx6dl())
@@ -469,6 +476,26 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
                clk_prepare_enable(clk[usbphy2_gate]);
        }
 
+       /* ipu clock initialization */
+       clk_set_parent(clk[ldb_di0_sel], clk[pll2_pfd0_352m]);
+       clk_set_parent(clk[ldb_di1_sel], clk[pll2_pfd0_352m]);
+       clk_set_parent(clk[ipu1_di0_pre_sel], clk[pll5_video_div]);
+       clk_set_parent(clk[ipu1_di1_pre_sel], clk[pll5_video_div]);
+       clk_set_parent(clk[ipu2_di0_pre_sel], clk[pll5_video_div]);
+       clk_set_parent(clk[ipu2_di1_pre_sel], clk[pll5_video_div]);
+       clk_set_parent(clk[ipu1_di0_sel], clk[ipu1_di0_pre]);
+       clk_set_parent(clk[ipu1_di1_sel], clk[ipu1_di1_pre]);
+       clk_set_parent(clk[ipu2_di0_sel], clk[ipu2_di0_pre]);
+       clk_set_parent(clk[ipu2_di1_sel], clk[ipu2_di1_pre]);
+       if (cpu_is_imx6dl()) {
+               clk_set_rate(clk[pll3_pfd1_540m], 540000000);
+               clk_set_parent(clk[ipu1_sel], clk[pll3_pfd1_540m]);
+               clk_set_parent(clk[axi_sel], clk[pll3_pfd1_540m]);
+       } else if (cpu_is_imx6q()) {
+               clk_set_parent(clk[ipu1_sel], clk[mmdc_ch0_axi]);
+               clk_set_parent(clk[ipu2_sel], clk[mmdc_ch0_axi]);
+       }
+
        /*
         * Let's initially set up CLKO with OSC24M, since this configuration
         * is widely used by imx6q board designs to clock audio codec.
@@ -489,10 +516,6 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
        /* Set initial power mode */
        imx6q_set_lpm(WAIT_CLOCKED);
 
-       np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
-       base = of_iomap(np, 0);
-       WARN_ON(!base);
-       irq = irq_of_parse_and_map(np, 0);
-       mxc_timer_init(base, irq);
+       mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"));
 }
 CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init);