Merge branch 'next/drivers' into late/multiplatform

[karo-tx-linux.git] / arch / arm / mach-omap2 / gpmc-nand.c

diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index afc1e8c32d6ccf8ced2372f6131300a8407ed1d7..d9c27195caf0ffa2d9ee38b17cc23067954d6a21 100644 (file)
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -74,14 +74,6 @@ static int omap2_nand_gpmc_retime(
        t.cs_wr_off = gpmc_t->cs_wr_off;
        t.wr_cycle = gpmc_t->wr_cycle;
 
-       /* Configure GPMC */
-       if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
-               gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 1);
-       else
-               gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 0);
-       gpmc_cs_configure(gpmc_nand_data->cs,
-                       GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND);
-       gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_WP, 0);
        err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t);
        if (err)
                return err;
@@ -115,14 +107,18 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
                   struct gpmc_timings *gpmc_t)
 {
        int err = 0;
+       struct gpmc_settings s;
        struct device *dev = &gpmc_nand_device.dev;
 
+       memset(&s, 0, sizeof(struct gpmc_settings));
+
        gpmc_nand_device.dev.platform_data = gpmc_nand_data;
 
        err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
                                (unsigned long *)&gpmc_nand_resource[0].start);
        if (err < 0) {
-               dev_err(dev, "Cannot request GPMC CS\n");
+               dev_err(dev, "Cannot request GPMC CS %d, error %d\n",
+                       gpmc_nand_data->cs, err);
                return err;
        }
 
@@ -140,11 +136,31 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
                        dev_err(dev, "Unable to set gpmc timings: %d\n", err);
                        return err;
                }
-       }
 
-       /* Enable RD PIN Monitoring Reg */
-       if (gpmc_nand_data->dev_ready) {
-               gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_RDY_BSY, 1);
+               if (gpmc_nand_data->of_node) {
+                       gpmc_read_settings_dt(gpmc_nand_data->of_node, &s);
+               } else {
+                       s.device_nand = true;
+
+                       /* Enable RD PIN Monitoring Reg */
+                       if (gpmc_nand_data->dev_ready) {
+                               s.wait_on_read = true;
+                               s.wait_on_write = true;
+                       }
+               }
+
+               if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
+                       s.device_width = GPMC_DEVWIDTH_16BIT;
+               else
+                       s.device_width = GPMC_DEVWIDTH_8BIT;
+
+               err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s);
+               if (err < 0)
+                       goto out_free_cs;
+
+               err = gpmc_configure(GPMC_CONFIG_WP, 0);
+               if (err < 0)
+                       goto out_free_cs;
        }
 
        gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);