Merge branch 'copy_user' of git://git.marvell.com/orion into devel

[mv-sheeva.git] / arch / arm / mach-omap2 / irq.c

diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 998c5c45587ea31ac1c527aaff399c717907c3a4..b82863887f10ebe96a3d8db573d99d0c7ae6d9a3 100644 (file)
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -28,7 +28,6 @@
 #define INTC_MIR_CLEAR0                0x0088
 #define INTC_MIR_SET0          0x008c
 #define INTC_PENDING_IRQ0      0x0098
-
 /* Number of IRQ state bits in each MIR register */
 #define IRQ_BITS_PER_REG       32
 
@@ -134,7 +133,6 @@ static struct irq_chip omap_irq_chip = {
        .ack    = omap_mask_ack_irq,
        .mask   = omap_mask_irq,
        .unmask = omap_unmask_irq,
-       .disable = omap_mask_irq,
 };
 
 static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
@@ -157,6 +155,22 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
        intc_bank_write_reg(1 << 0, bank, INTC_SYSCONFIG);
 }
 
+int omap_irq_pending(void)
+{
+       int i;
+
+       for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
+               struct omap_irq_bank *bank = irq_banks + i;
+               int irq;
+
+               for (irq = 0; irq < bank->nr_irqs; irq += 32)
+                       if (intc_bank_read_reg(bank, INTC_PENDING_IRQ0 +
+                                              ((irq >> 5) << 5)))
+                               return 1;
+       }
+       return 0;
+}
+
 void __init omap_init_irq(void)
 {
        unsigned long nr_of_irqs = 0;