Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied...

[mv-sheeva.git] / arch / arm / mm / cache-l2x0.c

diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 1a14d18e57139551149a8a315bee833f241adc3b..07334632d3e2761293e1880b2486a2e85c3437e4 100644 (file)
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -56,12 +56,42 @@ static inline void l2x0_inv_line(unsigned long addr)
        writel(addr, base + L2X0_INV_LINE_PA);
 }
 
+#ifdef CONFIG_PL310_ERRATA_588369
+static void debug_writel(unsigned long val)
+{
+       extern void omap_smc1(u32 fn, u32 arg);
+
+       /*
+        * Texas Instrument secure monitor api to modify the
+        * PL310 Debug Control Register.
+        */
+       omap_smc1(0x100, val);
+}
+
+static inline void l2x0_flush_line(unsigned long addr)
+{
+       void __iomem *base = l2x0_base;
+
+       /* Clean by PA followed by Invalidate by PA */
+       cache_wait(base + L2X0_CLEAN_LINE_PA, 1);
+       writel(addr, base + L2X0_CLEAN_LINE_PA);
+       cache_wait(base + L2X0_INV_LINE_PA, 1);
+       writel(addr, base + L2X0_INV_LINE_PA);
+}
+#else
+
+/* Optimised out for non-errata case */
+static inline void debug_writel(unsigned long val)
+{
+}
+
 static inline void l2x0_flush_line(unsigned long addr)
 {
        void __iomem *base = l2x0_base;
        cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1);
        writel(addr, base + L2X0_CLEAN_INV_LINE_PA);
 }
+#endif
 
 static inline void l2x0_inv_all(void)
 {
@@ -83,13 +113,17 @@ static void l2x0_inv_range(unsigned long start, unsigned long end)
        spin_lock_irqsave(&l2x0_lock, flags);
        if (start & (CACHE_LINE_SIZE - 1)) {
                start &= ~(CACHE_LINE_SIZE - 1);
+               debug_writel(0x03);
                l2x0_flush_line(start);
+               debug_writel(0x00);
                start += CACHE_LINE_SIZE;
        }
 
        if (end & (CACHE_LINE_SIZE - 1)) {
                end &= ~(CACHE_LINE_SIZE - 1);
+               debug_writel(0x03);
                l2x0_flush_line(end);
+               debug_writel(0x00);
        }
 
        while (start < end) {
@@ -145,10 +179,12 @@ static void l2x0_flush_range(unsigned long start, unsigned long end)
        while (start < end) {
                unsigned long blk_end = start + min(end - start, 4096UL);
 
+               debug_writel(0x03);
                while (start < blk_end) {
                        l2x0_flush_line(start);
                        start += CACHE_LINE_SIZE;
                }
+               debug_writel(0x00);
 
                if (blk_end < end) {
                        spin_unlock_irqrestore(&l2x0_lock, flags);