mxc pwm: add mx25 support

[mv-sheeva.git] / arch / arm / plat-mxc / pwm.c

diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 42dd17b89ff3d28130e9eccbd58f1eaff5e658e7..5cdbd605ac05d62f9b38715b03b437989a8d6b5c 100644 (file)
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -32,6 +32,7 @@
 #define MX3_PWMPR                 0x10    /* PWM Period Register */
 #define MX3_PWMCR_PRESCALER(x)    (((x - 1) & 0xFFF) << 4)
 #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
+#define MX3_PWMCR_CLKSRC_IPG      (1 << 16)
 #define MX3_PWMCR_EN              (1 << 0)
 
 
@@ -55,9 +56,11 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
        if (pwm == NULL || period_ns == 0 || duty_ns > period_ns)
                return -EINVAL;
 
-       if (cpu_is_mx27() || cpu_is_mx3()) {
+       if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25()) {
                unsigned long long c;
                unsigned long period_cycles, duty_cycles, prescale;
+               u32 cr;
+
                c = clk_get_rate(pwm->clk);
                c = c * period_ns;
                do_div(c, 1000000000);
@@ -72,9 +75,15 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
 
                writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
                writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
-               writel(MX3_PWMCR_PRESCALER(prescale) |
-                       MX3_PWMCR_CLKSRC_IPG_HIGH | MX3_PWMCR_EN,
-                       pwm->mmio_base + MX3_PWMCR);
+
+               cr = MX3_PWMCR_PRESCALER(prescale) | MX3_PWMCR_EN;
+
+               if (cpu_is_mx25())
+                       cr |= MX3_PWMCR_CLKSRC_IPG;
+               else
+                       cr |= MX3_PWMCR_CLKSRC_IPG_HIGH;
+
+               writel(cr, pwm->mmio_base + MX3_PWMCR);
        } else if (cpu_is_mx1() || cpu_is_mx21()) {
                /* The PWM subsystem allows for exact frequencies. However,
                 * I cannot connect a scope on my device to the PWM line and