Merge branch 'for-2.6.30' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie...

[karo-tx-linux.git] / arch / arm / plat-s3c24xx / sleep.S

diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S
index 7c1955ff31711ca5af4f8b268ba2b1a7dbc30103..e73e3b6e88d2dfbb0a97ca074b0d7863f0eec282 100644 (file)
--- a/arch/arm/plat-s3c24xx/sleep.S
+++ b/arch/arm/plat-s3c24xx/sleep.S
@@ -41,25 +41,13 @@
 
        .text
 
-       /* s3c2410_cpu_save
-        *
-        * save enough of the CPU state to allow us to re-start
-        * pm.c code. as we store items like the sp/lr, we will
-        * end up returning from this function when the cpu resumes
-        * so the return value is set to mark this.
-        *
-        * This arangement means we avoid having to flush the cache
-        * from this code.
+       /* s3c_cpu_save
         *
         * entry:
-        *      r0 = pointer to save block
-        *
-        * exit:
-        *      r0 = 0 => we stored everything
-        *           1 => resumed from sleep
+        *      r0 = save address (virtual addr of s3c_sleep_save_phys)
        */
 
-ENTRY(s3c2410_cpu_save)
+ENTRY(s3c_cpu_save)
        stmfd   sp!, { r4 - r12, lr }
 
        @@ store co-processor registers
@@ -71,14 +59,19 @@ ENTRY(s3c2410_cpu_save)
 
        stmia   r0, { r4 - r13 }
 
-       mov     r0, #0
-       ldmfd   sp, { r4 - r12, pc }
+       @@ write our state back to RAM
+       bl      s3c_pm_cb_flushcache
 
+       @@ jump to final code to send system to sleep
+       ldr     r0, =pm_cpu_sleep
+       @@ldr   pc, [ r0 ]
+       ldr     r0, [ r0 ]
+       mov     pc, r0
+       
        @@ return to the caller, after having the MMU
        @@ turned on, this restores the last bits from the
        @@ stack
 resume_with_mmu:
-       mov     r0, #1
        ldmfd   sp!, { r4 - r12, pc }
 
        .ltorg
@@ -99,12 +92,12 @@ s3c_sleep_save_phys:
 
        /* sleep magic, to allow the bootloader to check for an valid
         * image to resume to. Must be the first word before the
-        * s3c2410_cpu_resume entry.
+        * s3c_cpu_resume entry.
        */
 
        .word   0x2bedf00d
 
-       /* s3c2410_cpu_resume
+       /* s3c_cpu_resume
         *
         * resume code entry for bootloader to call
         *
@@ -113,7 +106,7 @@ s3c_sleep_save_phys:
         * must not write to the code segment (code is read-only)
        */
 
-ENTRY(s3c2410_cpu_resume)
+ENTRY(s3c_cpu_resume)
        mov     r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
        msr     cpsr_c, r0