]> git.karo-electronics.de Git - karo-tx-linux.git/blobdiff - arch/arm64/boot/dts/qcom/msm8916.dtsi
arm64: dts: sync up with new wcd codec bindings.
[karo-tx-linux.git] / arch / arm64 / boot / dts / qcom / msm8916.dtsi
index d5898c6888177dc5557484569dcdf7fbbf1a32dc..e28c852a61640bb3b0a03a99212b77431ddc48bb 100644 (file)
@@ -15,6 +15,7 @@
 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
+#include <dt-bindings/thermal/thermal.h>
 #include <dt-bindings/arm/qcom-ids.h>
 
 / {
                        reg = <0x0 0x86300000 0x0 0x0100000>;
                        no-map;
                };
+
+                hypervisor_mem: hypervisor_region@86400000 {
+                        no-map;
+                        reg = <0x0 0x86400000 0x0 0x0400000>;
+                };
+
+               modem_adsp_mem: modem_adsp_region@86800000 {
+                        no-map;
+                       reg = <0x0 0x86800000 0x0 0x04800000>;
+               };
+
+               rmtfs@86700000 {
+                       reg = <0x0 0x86700000 0x0 0xe0000>;
+                       no-map;
+               };
+
+                peripheral_mem: peripheral_region@8b600000 {
+                        no-map;
+                        reg = <0x0 0x8b600000 0x0 0x0600000>;
+                };
+
+               wcnss_mem: wcnss@89300000 {
+                       reg = <0x0 0x89300000 0x0 0x600000>;
+                       no-map;
+               };
+
+               vidc_mem: vidc_region@8f800000 {
+                       no-map;
+                       reg = <0 0x8f800000 0 0x800000>;
+               };
+
+               mba_mem: mba@8ea00000 {
+                       no-map;
+                       reg = <0 0x8ea00000 0 0x100000>;
+               };
        };
 
        cpus {
                        next-level-cache = <&L2_0>;
                        clocks = <&a53cc 1>;
                        clock-latency = <200000>;
+                       cpu-supply = <&pm8916_spmi_s2>;
+                       /* cooling options */
+                       cooling-min-level = <0>;
+                       cooling-max-level = <7>;
+                       #cooling-cells = <2>;
                        L2_0: l2-cache {
                              compatible = "arm,arch-cache";
                              cache-level = <2>;
                        next-level-cache = <&L2_0>;
                        clocks = <&a53cc 1>;
                        clock-latency = <200000>;
+                       cpu-supply = <&pm8916_spmi_s2>;
+                       /* cooling options */
+                       cooling-min-level = <0>;
+                       cooling-max-level = <7>;
+                       #cooling-cells = <2>;
                };
 
                CPU2: cpu@2 {
                        next-level-cache = <&L2_0>;
                        clocks = <&a53cc 1>;
                        clock-latency = <200000>;
+                       cpu-supply = <&pm8916_spmi_s2>;
+                       /* cooling options */
+                       cooling-min-level = <0>;
+                       cooling-max-level = <7>;
+                       #cooling-cells = <2>;
                };
 
                CPU3: cpu@3 {
                        next-level-cache = <&L2_0>;
                        clocks = <&a53cc 1>;
                        clock-latency = <200000>;
+                       cpu-supply = <&pm8916_spmi_s2>;
+                       /* cooling options */
+                       cooling-min-level = <0>;
+                       cooling-max-level = <7>;
+                       #cooling-cells = <2>;
                };
        };
 
                interrupts = <GIC_PPI 7 GIC_CPU_MASK_SIMPLE(4)>;
        };
 
+       thermal-zones {
+               cpu-thermal0 {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+
+                       thermal-sensors = <&tsens 4>;
+
+                       trips {
+                               cpu_alert0: trip@0 {
+                                       temperature = <75000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+                               cpu_crit0: trip@1 {
+                                       temperature = <100000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
+
+                       cooling-maps {
+                               map0 {
+                                       trip = <&cpu_alert0>;
+                                       cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                       };
+               };
+
+               cpu-thermal1 {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+
+                       thermal-sensors = <&tsens 3>;
+
+                       trips {
+                               cpu_alert1: trip@0 {
+                                       temperature = <75000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+                               cpu_crit1: trip@1 {
+                                       temperature = <100000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
+
+                       cooling-maps {
+                               map0 {
+                                       trip = <&cpu_alert1>;
+                                       cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                       };
+               };
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
                        compatible = "fixed-clock";
                        #clock-cells = <0>;
                        clock-frequency = <19200000>;
+                       clock-output-names = "xo_board";
                };
 
                sleep_clk: sleep_clk {
                };
        };
 
-       smem {
-               compatible = "qcom,smem";
-
-               memory-region = <&smem_mem>;
-               qcom,rpm-msg-ram = <&rpm_msg_ram>;
+       firmware {
+               compatible = "simple-bus";
 
-               hwlocks = <&tcsr_mutex 3>;
+               scm: scm {
+                       compatible = "qcom,scm";
+                       clocks = <&gcc GCC_CRYPTO_CLK> , <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>;
+                       clock-names = "core", "bus", "iface";
+                       #reset-cells = <1>;
+               };
        };
 
        soc: soc {
                        interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_BOTH>,
                                     <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
 
+                       v1p8-supply = <&pm8916_l7>;
+                       v3p3-supply = <&pm8916_l13>;
                        qcom,vdd-levels = <1 5 7>;
                        qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>;
                        dr_mode = "peripheral";
                        qcom,otg-control = <2>; // PMIC
                        qcom,manual-pullup;
 
+                       qcom,msm-bus,name = "usb2";
+                       qcom,msm-bus,num-cases = <3>;
+                       qcom,msm-bus,num-paths = <1>;
+                       qcom,msm-bus,vectors-KBps =
+                                       <87 512 0 0>,
+                                       <87 512 80000 0>,
+                                       <87 512 6000  6000>;
+
                        clocks = <&gcc GCC_USB_HS_AHB_CLK>,
                                 <&gcc GCC_USB_HS_SYSTEM_CLK>,
                                 <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
 
                /* Audio */
 
+               lpass_codec_core: lpass-codec{
+                       compatible = "syscon", "qcom,msm8916-lpass-codec";
+                       reg = <0x0771c000 0x400>;
+               };
+
                lpass: lpass-cpu@07700000 {
                        status = "disabled";
                        compatible = "qcom,lpass-cpu-apq8016";
                                 <&gcc GCC_ULTAUDIO_PCNOC_SWAY_CLK>,
                                 <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>,
                                 <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
-                                <&gcc GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK>,
+                                <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
                                 <&gcc GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK>;
 
                        clock-names = "ahbix-clk",
                        qcom,vdd-apc-step-down-limit = <1>;
                        qcom,cpr-cpus = <&CPU0 &CPU1 &CPU2 &CPU3>;
                };
+
+               qfprom: qfprom@5c000 {
+                       compatible = "qcom,qfprom";
+                       reg = <0x5c000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       tsens_caldata: caldata@d0 {
+                               reg = <0xd0 0x8>;
+                       };
+                       tsens_calsel: calsel@ec {
+                               reg = <0xec 0x4>;
+                       };
+               };
+
+               tsens: thermal-sensor@4a8000 {
+                       compatible = "qcom,msm8916-tsens";
+                       reg = <0x4a8000 0x2000>;
+                       nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
+                       nvmem-cell-names = "calib", "calib_sel";
+                       qcom,tsens-slopes = <3200 3200 3200 3200 3200>;
+                       qcom,sensor-id = <0 1 2 4 5>;
+                       #thermal-sensor-cells = <1>;
+               };
+
+               hexagon@4080000 {
+                       compatible = "qcom,pil-q6v56-mss", "qcom,q6v5-pil";
+                       reg = <0x04080000 0x100>,
+                             <0x04020000 0x040>;
+
+                       reg-names = "qdsp6", "rmb";
+
+                       interrupts-extended = <&intc 0 24 1>,
+                                             <&hexagon_smp2p_in 0 0>,
+                                             <&hexagon_smp2p_in 1 0>,
+                                             <&hexagon_smp2p_in 2 0>,
+                                             <&hexagon_smp2p_in 3 0>;
+                       interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
+
+                       clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>, <&gcc GCC_BOOT_ROM_AHB_CLK>;
+                       clock-names = "iface", "bus", "mem";
+
+                       qcom,state = <&hexagon_smp2p_out 0>;
+                       qcom,state-names = "stop";
+
+                       resets = <&scm 0>;
+                       reset-names = "mss_restart";
+
+                       mx-supply = <&pm8916_l3>;
+                       pll-supply = <&pm8916_l7>;
+
+                       qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>;
+
+                       mba {
+                               memory-region = <&mba_mem>;
+                       };
+
+                       mpss {
+                               memory-region = <&modem_adsp_mem>;
+                       };
+               };
+
+               pronto: wcnss@a21b000 {
+                       compatible = "qcom,pronto-v2-pil", "qcom,pronto";
+                       reg = <0x0a204000 0x2000>, <0x0a202000 0x1000>, <0x0a21b000 0x3000>;
+                       reg-names = "ccu", "dxe", "pmu";
+
+                       memory-region = <&wcnss_mem>;
+
+                       interrupts-extended = <&intc 0 149 IRQ_TYPE_EDGE_RISING>,
+                               <&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+                               <&wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+                               <&wcnss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+                               <&wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
+
+                       vddmx-supply = <&pm8916_l3>;
+                       vddpx-supply = <&pm8916_l7>;
+
+                       qcom,state = <&wcnss_smp2p_out 0>;
+                       qcom,state-names = "stop";
+
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&wcnss_default>;
+
+                       iris {
+                               compatible = "qcom,wcn3620";
+
+                               clocks = <&rpmcc RPM_SMD_RF_CLK2>;
+                               clock-names = "xo";
+
+                               vddxo-supply = <&pm8916_l7>;
+                               vddrfa-supply = <&pm8916_s3>;
+                               vddpa-supply = <&pm8916_l9>;
+                               vdddig-supply = <&pm8916_l5>;
+                       };
+               };
+
+               qcom,rpm-log@29dc00 {
+                       compatible = "qcom,rpm-log";
+                       reg = <0x29dc00 0x4000>;
+                       qcom,rpm-addr-phys = <0x200000>;
+                       qcom,offset-version = <4>;
+                       qcom,offset-page-buffer-addr = <36>;
+                       qcom,offset-log-len = <40>;
+                       qcom,offset-log-len-mask = <44>;
+                       qcom,offset-page-indices = <56>;
+               };
+
+               vidc_rproc: vidc_tzpil@0 {
+                       compatible = "qcom,tz-pil";
+                       clocks = <&gcc GCC_CRYPTO_CLK>,
+                                <&gcc GCC_CRYPTO_AHB_CLK>,
+                                <&gcc GCC_CRYPTO_AXI_CLK>,
+                                <&gcc CRYPTO_CLK_SRC>;
+                       clock-names = "scm_core_clk", "scm_iface_clk",
+                                     "scm_bus_clk", "scm_src_clk";
+                       qcom,firmware-name = "venus";
+                       qcom,pas-id = <9>;
+                       memory-region = <&vidc_mem>;
+                       status = "disabled";
+               };
+
+               vidc: qcom,vidc@1d00000 {
+                       compatible = "qcom,msm-vidc";
+                       reg = <0x01d00000 0xff000>;
+                       interrupts = <GIC_SPI 44 0>;
+                       power-domains = <&gcc VENUS_GDSC>;
+                       clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
+                                <&gcc GCC_VENUS0_AHB_CLK>,
+                                <&gcc GCC_VENUS0_AXI_CLK>;
+                       clock-names = "core_clk", "iface_clk", "bus_clk";
+                       qcom,hfi = "venus";
+                       qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
+                       qcom,enable-idle-indicator;
+                       rproc = <&vidc_rproc>;
+                       qcom,iommu-cb = <&venus_ns>,
+                                       <&venus_sec_bitstream>,
+                                       <&venus_sec_pixel>,
+                                       <&venus_sec_non_pixel>;
+                       status = "disabled";
+               };
        };
 
+       smem {
+               compatible = "qcom,smem";
+
+               memory-region = <&smem_mem>;
+               qcom,rpm-msg-ram = <&rpm_msg_ram>;
+
+               hwlocks = <&tcsr_mutex 3>;
+       };
        smd {
                compatible = "qcom,smd";
 
                        interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
                        qcom,ipc = <&apcs 8 0>;
                        qcom,smd-edge = <15>;
+                       qcom,remote-pid = <0xffffffff>;
 
                        rpm_requests {
                                compatible = "qcom,rpm-msm8916";
                                qcom,smd-channels = "rpm_requests";
                                rpmcc: qcom,rpmcc {
-                                       compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc";
+                                       compatible = "qcom,rpmcc-msm8916";
                                        #clock-cells = <1>;
                                };
 
+                               msm-bus {
+                                               compatible = "qcom,rpm-msm-bus";
+                               };
                                pm8916-regulators {
                                        compatible = "qcom,rpm-pm8916-regulators";
 
                                };
                        };
                };
+
+               qcom,smd-modem {
+                       interrupts = <0 25 1>;
+                       qcom,smd-edge = <0>;
+                       qcom,ipc = <&apcs 8 12>;
+                       qcom,remote-pid = <1>;
+                       ipcrtr_requests {
+                               compatible = "qcom,ipcrtr";
+                               qcom,smd-channels = "IPCRTR";
+                       };
+               };
+
+               pronto {
+                       interrupts = <0 142 1>;
+
+                       qcom,ipc = <&apcs 8 17>;
+                       qcom,smd-edge = <6>;
+                       qcom,remote-pid = <4>;
+
+                       wcnss {
+                               compatible = "qcom,wcnss";
+                               qcom,smd-channels = "WCNSS_CTRL";
+
+                               qcom,mmio = <&pronto>;
+
+                               bt {
+                                       compatible = "qcom,wcnss-bt";
+                               };
+
+                               wifi {
+                                       compatible = "qcom,wcnss-wlan";
+
+                                       interrupts = <0 145 0>, <0 146 0>;
+                                       interrupt-names = "tx", "rx";
+
+                                       qcom,state = <&apps_smsm 10>, <&apps_smsm 9>;
+                                       qcom,state-names = "tx-enable", "tx-rings-empty";
+                               };
+                       };
+               };
+       };
+
+       hexagon-smp2p {
+               compatible = "qcom,smp2p";
+               qcom,smem = <435>, <428>;
+
+               interrupts = <0 27 IRQ_TYPE_EDGE_RISING>;
+
+               qcom,ipc = <&apcs 8 14>;
+
+               qcom,local-pid = <0>;
+               qcom,remote-pid = <1>;
+
+               hexagon_smp2p_out: master-kernel {
+                       qcom,entry-name = "master-kernel";
+
+                       #qcom,state-cells = <1>;
+               };
+
+               hexagon_smp2p_in: slave-kernel {
+                       qcom,entry-name = "slave-kernel";
+
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+               };
+       };
+
+       wcnss-smp2p {
+               compatible = "qcom,smp2p";
+               qcom,smem = <451>, <431>;
+
+               interrupts = <0 143 IRQ_TYPE_EDGE_RISING>;
+
+               qcom,ipc = <&apcs 8 18>;
+
+               qcom,local-pid = <0>;
+               qcom,remote-pid = <4>;
+
+               wcnss_smp2p_out: master-kernel {
+                       qcom,entry-name = "master-kernel";
+
+                       #qcom,state-cells = <1>;
+               };
+
+               wcnss_smp2p_in: slave-kernel {
+                       qcom,entry-name = "slave-kernel";
+
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+               };
+       };
+
+       smsm {
+               compatible = "qcom,smsm";
+
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               qcom,ipc-1 = <&apcs 0 13>;
+               qcom,ipc-6 = <&apcs 0 19>;
+
+               apps_smsm: apps@0 {
+                       reg = <0>;
+
+                       #qcom,state-cells = <1>;
+               };
+
+               hexagon_smsm: hexagon@1 {
+                       reg = <1>;
+                       interrupts = <0 26 IRQ_TYPE_EDGE_RISING>;
+
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+               };
+
+               wcnss_smsm: wcnss@6 {
+                       reg = <6>;
+                       interrupts = <0 144 IRQ_TYPE_EDGE_RISING>;
+
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+               };
        };
 };
 
 #include "msm8916-pins.dtsi"
+#include "msm8916-iommu.dtsi"
+#include "msm8916-coresight.dtsi"
+#include "msm8916-bus.dtsi"