ARMv8/Layerscape: switch SMP method accordingly

[karo-tx-uboot.git] / arch / microblaze / cpu / start.S

diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S
index 4023ec067531474207cf5d4432b84d669348c89e..e9923b65ef3237bd1e2a60d3db34e0c5ee537146 100644 (file)
--- a/arch/microblaze/cpu/start.S
+++ b/arch/microblaze/cpu/start.S
@@ -25,12 +25,17 @@ _start:
 
        addi    r8, r0, __end
        mts     rslr, r8
+       /* TODO: Redo this code to call board_init_f_*() */
 #if defined(CONFIG_SPL_BUILD)
        addi    r1, r0, CONFIG_SPL_STACK_ADDR
        mts     rshr, r1
        addi    r1, r1, -4      /* Decrement SP to top of memory */
+#else
+#if defined(CONFIG_SYS_MALLOC_F_LEN)
+       addi    r1, r0, CONFIG_SYS_INIT_SP_OFFSET - CONFIG_SYS_MALLOC_F_LEN
 #else
        addi    r1, r0, CONFIG_SYS_INIT_SP_OFFSET
+#endif
        mts     rshr, r1
        addi    r1, r1, -4      /* Decrement SP to top of memory */
 
@@ -137,6 +142,7 @@ _start:
        ori     r12, r12, 0x1a0
        mts     rmsr, r12
 
+       /* TODO: Redo this code to call board_init_f_*() */
 clear_bss:
        /* clear BSS segments */
        addi    r5, r0, __bss_start
@@ -149,15 +155,33 @@ clear_bss:
        cmp     r6, r5, r4 /* check if we have reach the end */
        bnei    r6, 2b
 3:     /* jumping to board_init */
+#ifdef CONFIG_DEBUG_UART
+       bralid  r15, debug_uart_init
+       nop
+#endif
 #ifndef CONFIG_SPL_BUILD
        or      r5, r0, r0      /* flags - empty */
+       addi    r31, r0, _gd
+#if defined(CONFIG_SYS_MALLOC_F_LEN)
+       addi    r6, r0, CONFIG_SYS_INIT_SP_OFFSET
+       swi     r6, r31, GD_MALLOC_BASE
+#endif
        brai    board_init_f
 #else
-       addi    r31, r0, CONFIG_SYS_SPL_MALLOC_END
+       addi    r31, r0, _gd
+#if defined(CONFIG_SYS_MALLOC_F_LEN)
+       addi    r6, r0, CONFIG_SPL_STACK_ADDR
+       swi     r6, r31, GD_MALLOC_BASE
+#endif
        brai    board_init_r
 #endif
 1:     bri     1b
 
+ .section .bss
+.align 4
+_gd:
+         .space  GENERATED_GBL_DATA_SIZE
+
 #ifndef CONFIG_SPL_BUILD
 /*
  * Read 16bit little endian