Merge branch 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...

[mv-sheeva.git] / arch / mips / alchemy / common / setup.c

diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c
index 6184baa56786703af2ef195cf9ee77318cace225..561e5da2658b36f999c6da9bc8377c9f0b203289 100644 (file)
--- a/arch/mips/alchemy/common/setup.c
+++ b/arch/mips/alchemy/common/setup.c
@@ -29,18 +29,13 @@
 #include <linux/ioport.h>
 #include <linux/jiffies.h>
 #include <linux/module.h>
-#include <linux/pm.h>
 
 #include <asm/mipsregs.h>
-#include <asm/reboot.h>
 #include <asm/time.h>
 
 #include <au1000.h>
 
 extern void __init board_setup(void);
-extern void au1000_restart(char *);
-extern void au1000_halt(void);
-extern void au1000_power_off(void);
 extern void set_cpuspec(void);
 
 void __init plat_mem_setup(void)
@@ -57,10 +52,6 @@ void __init plat_mem_setup(void)
        /* this is faster than wasting cycles trying to approximate it */
        preset_lpj = (est_freq >> 1) / HZ;
 
-       _machine_restart = au1000_restart;
-       _machine_halt = au1000_halt;
-       pm_power_off = au1000_power_off;
-
        board_setup();  /* board specific setup */
 
        if (au1xxx_cpu_needs_config_od())
@@ -78,37 +69,20 @@ void __init plat_mem_setup(void)
        iomem_resource.end = IOMEM_RESOURCE_END;
 }
 
-#if defined(CONFIG_64BIT_PHYS_ADDR)
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_PCI)
 /* This routine should be valid for all Au1x based boards */
 phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
 {
+       u32 start = (u32)Au1500_PCI_MEM_START;
+       u32 end   = (u32)Au1500_PCI_MEM_END;
+
        /* Don't fixup 36-bit addresses */
        if ((phys_addr >> 32) != 0)
                return phys_addr;
 
-#ifdef CONFIG_PCI
-       {
-               u32 start = (u32)Au1500_PCI_MEM_START;
-               u32 end   = (u32)Au1500_PCI_MEM_END;
-
-               /* Check for PCI memory window */
-               if (phys_addr >= start && (phys_addr + size - 1) <= end)
-                       return (phys_t)
-                              ((phys_addr - start) + Au1500_PCI_MEM_START);
-       }
-#endif
-
-       /*
-        * All Au1xx0 SOCs have a PCMCIA controller.
-        * We setup our 32-bit pseudo addresses to be equal to the
-        * 36-bit addr >> 4, to make it easier to check the address
-        * and fix it.
-        * The PCMCIA socket 0 physical attribute address is 0xF 4000 0000.
-        * The pseudo address we use is 0xF400 0000. Any address over
-        * 0xF400 0000 is a PCMCIA pseudo address.
-        */
-       if ((phys_addr >= 0xF4000000) && (phys_addr < 0xFFFFFFFF))
-               return (phys_t)(phys_addr << 4);
+       /* Check for PCI memory window */
+       if (phys_addr >= start && (phys_addr + size - 1) <= end)
+               return (phys_t)((phys_addr - start) + Au1500_PCI_MEM_START);
 
        /* default nop */
        return phys_addr;