MLK-10058-1 ARM: imx6sx: add one pcie phy regulator in gpc dts

[karo-tx-linux.git] / arch / mips / kernel / irq-gic.c

diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index c01b307317a9635b88394d18164710262e206234..78f18436cdf2b5ef1605018c405bbff9807b6788 100644 (file)
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -219,16 +219,15 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
 
        /* Assumption : cpumask refers to a single CPU */
        spin_lock_irqsave(&gic_lock, flags);
-       for (;;) {
-               /* Re-route this IRQ */
-               GIC_SH_MAP_TO_VPE_SMASK(irq, first_cpu(tmp));
 
-               /* Update the pcpu_masks */
-               for (i = 0; i < NR_CPUS; i++)
-                       clear_bit(irq, pcpu_masks[i].pcpu_mask);
-               set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
+       /* Re-route this IRQ */
+       GIC_SH_MAP_TO_VPE_SMASK(irq, first_cpu(tmp));
+
+       /* Update the pcpu_masks */
+       for (i = 0; i < NR_CPUS; i++)
+               clear_bit(irq, pcpu_masks[i].pcpu_mask);
+       set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
 
-       }
        cpumask_copy(d->affinity, cpumask);
        spin_unlock_irqrestore(&gic_lock, flags);
 
@@ -256,11 +255,13 @@ static void __init gic_setup_intr(unsigned int intr, unsigned int cpu,
 
        /* Setup Intr to Pin mapping */
        if (pin & GIC_MAP_TO_NMI_MSK) {
+               int i;
+
                GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_MAP_TO_PIN(intr)), pin);
                /* FIXME: hack to route NMI to all cpu's */
-               for (cpu = 0; cpu < NR_CPUS; cpu += 32) {
+               for (i = 0; i < NR_CPUS; i += 32) {
                        GICWRITE(GIC_REG_ADDR(SHARED,
-                                         GIC_SH_MAP_TO_VPE_REG_OFF(intr, cpu)),
+                                         GIC_SH_MAP_TO_VPE_REG_OFF(intr, i)),
                                 0xffffffff);
                }
        } else {