MIPS: perf: Remove incorrect odd/even counter handling for I6400

[karo-tx-linux.git] / arch / mips / kernel / perf_event_mipsxx.c

diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index 313a88b2973f673f0fac0998c36517fd2139504b..f3e301f95aef7edb160e122fa722d8cb6840a9a7 100644 (file)
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -1597,7 +1597,6 @@ static const struct mips_perf_event *mipsxx_pmu_map_raw_event(u64 config)
                break;
        case CPU_P5600:
        case CPU_P6600:
-       case CPU_I6400:
                /* 8-bit event numbers */
                raw_id = config & 0x1ff;
                base_id = raw_id & 0xff;
@@ -1610,6 +1609,11 @@ static const struct mips_perf_event *mipsxx_pmu_map_raw_event(u64 config)
                raw_event.range = P;
 #endif
                break;
+       case CPU_I6400:
+               /* 8-bit event numbers */
+               base_id = config & 0xff;
+               raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD;
+               break;
        case CPU_1004K:
                if (IS_BOTH_COUNTERS_1004K_EVENT(base_id))
                        raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD;