MIPS: add support for software performance events

[mv-sheeva.git] / arch / mips / kernel / unaligned.c

diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index 33d5a5ce4a29d56037a38abb346a99e0212c16c2..cfea1adfa1536dcb08302f9aa8ce3c279e37b7a9 100644 (file)
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -78,6 +78,8 @@
 #include <linux/smp.h>
 #include <linux/sched.h>
 #include <linux/debugfs.h>
+#include <linux/perf_event.h>
+
 #include <asm/asm.h>
 #include <asm/branch.h>
 #include <asm/byteorder.h>
@@ -109,6 +111,9 @@ static void emulate_load_store_insn(struct pt_regs *regs,
        unsigned long value;
        unsigned int res;
 
+       perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS,
+                     1, 0, regs, 0);
+
        /*
         * This load never faults.
         */
@@ -511,6 +516,8 @@ asmlinkage void do_ade(struct pt_regs *regs)
        unsigned int __user *pc;
        mm_segment_t seg;
 
+       perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS,
+                       1, 0, regs, regs->cp0_badvaddr);
        /*
         * Did we catch a fault trying to load an instruction?
         * Or are we running in MIPS16 mode?