MIPS: math-emu: Fix BC1EQZ and BC1NEZ condition handling

[karo-tx-linux.git] / arch / mips / math-emu / cp1emu.c

diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index a298ac93edcc01c00c3b05abc52d5b57340dbf79..f12fde10c8ad352b36c3be27ae8e021f6203b915 100644 (file)
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -439,6 +439,8 @@ int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
        union mips_instruction insn = (union mips_instruction)dec_insn.insn;
        unsigned int fcr31;
        unsigned int bit = 0;
+       unsigned int bit0;
+       union fpureg *fpr;
 
        switch (insn.i_format.opcode) {
        case spec_op:
@@ -706,14 +708,14 @@ int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
                    ((insn.i_format.rs == bc1eqz_op) ||
                     (insn.i_format.rs == bc1nez_op))) {
                        bit = 0;
+                       fpr = &current->thread.fpu.fpr[insn.i_format.rt];
+                       bit0 = get_fpr32(fpr, 0) & 0x1;
                        switch (insn.i_format.rs) {
                        case bc1eqz_op:
-                               if (get_fpr32(&current->thread.fpu.fpr[insn.i_format.rt], 0) & 0x1)
-                                   bit = 1;
+                               bit = bit0 == 0;
                                break;
                        case bc1nez_op:
-                               if (!(get_fpr32(&current->thread.fpu.fpr[insn.i_format.rt], 0) & 0x1))
-                                   bit = 1;
+                               bit = bit0 != 0;
                                break;
                        }
                        if (bit)