arm64: Enable workaround for Cavium erratum 27456 on thunderx-81xx

[karo-tx-linux.git] / arch / mips / mm / c-tx39.c

diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index 8d909dbbf37f56e545a0451cad028dc061b7fbe8..596e18458e041cf74d2cdf2974fcc701144591c0 100644 (file)
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -28,8 +28,6 @@ static unsigned long icache_size, dcache_size;                /* Size in bytes */
 
 #include <asm/r4kcache.h>
 
-extern int r3k_have_wired_reg; /* in r3k-tlb.c */
-
 /* This sequence is required to ensure icache is disabled immediately */
 #define TX39_STOP_STREAMING() \
 __asm__ __volatile__( \
@@ -383,8 +381,6 @@ void tx39_cache_init(void)
        case CPU_TX3927:
        default:
                /* TX39/H2,H3 core (writeback 2way-set-associative cache) */
-               r3k_have_wired_reg = 1;
-               write_c0_wired(0);      /* set 8 on reset... */
                /* board-dependent init code may set WBON */
 
                __flush_cache_vmap      = tx39__flush_cache_vmap;