*/
#define LOONGSON2_CPU_TYPE "mips/loongson2"
-#define LOONGSON2_COUNTER1_EVENT(event) ((event & 0x0f) << 5)
-#define LOONGSON2_COUNTER2_EVENT(event) ((event & 0x0f) << 9)
+#define LOONGSON2_PERFCTRL_EVENT(idx, event) \
+ (((event) & 0x0f) << ((idx) ? 9 : 5))
#define LOONGSON2_PERFCNT_EXL (1UL << 0)
#define LOONGSON2_PERFCNT_KERNEL (1UL << 1)
/* Compute the performance counter ctrl word. */
/* For now count kernel and user mode */
if (cfg[0].enabled) {
- ctrl |= LOONGSON2_COUNTER1_EVENT(cfg[0].event);
+ ctrl |= LOONGSON2_PERFCTRL_EVENT(0, cfg[0].event);
reg.reset_counter1 = 0x80000000ULL - cfg[0].count;
}
if (cfg[1].enabled) {
- ctrl |= LOONGSON2_COUNTER2_EVENT(cfg[1].event);
- reg.reset_counter2 = (0x80000000ULL - cfg[1].count);
+ ctrl |= LOONGSON2_PERFCTRL_EVENT(1, cfg[1].event);
+ reg.reset_counter2 = 0x80000000ULL - cfg[1].count;
}
if (cfg[0].enabled || cfg[1].enabled) {
static void loongson2_cpu_setup(void *args)
{
- uint64_t perfcount;
-
- perfcount = (reg.reset_counter2 << 32) | reg.reset_counter1;
- write_c0_perfcnt(perfcount);
+ write_c0_perfcnt((reg.reset_counter2 << 32) | reg.reset_counter1);
}
static void loongson2_cpu_start(void *args)
*/
/* Check whether the irq belongs to me */
- enabled = read_c0_perfcnt() & LOONGSON2_PERFCNT_INT_EN;
+ enabled = read_c0_perfctrl() & LOONGSON2_PERFCNT_INT_EN;
if (!enabled)
return IRQ_NONE;
enabled = reg.cnt1_enabled | reg.cnt2_enabled;