Merge remote-tracking branch 'hid/for-next'

[karo-tx-linux.git] / arch / mips / pci / fixup-malta.c

diff --git a/arch/mips/pci/fixup-malta.c b/arch/mips/pci/fixup-malta.c
index 07ada7f8441ead44606e732f179a9d2dc4d0e00e..df36e2327c54572cca76848547cbbbf030c554ac 100644 (file)
--- a/arch/mips/pci/fixup-malta.c
+++ b/arch/mips/pci/fixup-malta.c
@@ -1,5 +1,6 @@
 #include <linux/init.h>
 #include <linux/pci.h>
+#include <asm/mips-boards/piix4.h>
 
 /* PCI interrupt pins */
 #define PCIA           1
@@ -53,7 +54,8 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
 static void malta_piix_func0_fixup(struct pci_dev *pdev)
 {
        unsigned char reg_val;
-       static int piixirqmap[16] = {  /* PIIX PIRQC[A:D] irq mappings */
+       /* PIIX PIRQC[A:D] irq mappings */
+       static int piixirqmap[PIIX4_FUNC0_PIRQRC_IRQ_ROUTING_MAX] = {
                0,  0,  0,  3,
                4,  5,  6,  7,
                0,  9, 10, 11,
@@ -63,11 +65,12 @@ static void malta_piix_func0_fixup(struct pci_dev *pdev)
 
        /* Interrogate PIIX4 to get PCI IRQ mapping */
        for (i = 0; i <= 3; i++) {
-               pci_read_config_byte(pdev, 0x60+i, &reg_val);
-               if (reg_val & 0x80)
+               pci_read_config_byte(pdev, PIIX4_FUNC0_PIRQRC+i, &reg_val);
+               if (reg_val & PIIX4_FUNC0_PIRQRC_IRQ_ROUTING_DISABLE)
                        pci_irq[PCIA+i] = 0;    /* Disabled */
                else
-                       pci_irq[PCIA+i] = piixirqmap[reg_val & 15];
+                       pci_irq[PCIA+i] = piixirqmap[reg_val &
+                               PIIX4_FUNC0_PIRQRC_IRQ_ROUTING_MASK];
        }
 
        /* Done by YAMON 2.00 onwards */
@@ -76,8 +79,9 @@ static void malta_piix_func0_fixup(struct pci_dev *pdev)
                 * Set top of main memory accessible by ISA or DMA
                 * devices to 16 Mb.
                 */
-               pci_read_config_byte(pdev, 0x69, &reg_val);
-               pci_write_config_byte(pdev, 0x69, reg_val | 0xf0);
+               pci_read_config_byte(pdev, PIIX4_FUNC0_TOM, &reg_val);
+               pci_write_config_byte(pdev, PIIX4_FUNC0_TOM, reg_val |
+                               PIIX4_FUNC0_TOM_TOP_OF_MEMORY_MASK);
        }
 }
 
@@ -93,10 +97,14 @@ static void malta_piix_func1_fixup(struct pci_dev *pdev)
                /*
                 * IDE Decode enable.
                 */
-               pci_read_config_byte(pdev, 0x41, &reg_val);
-               pci_write_config_byte(pdev, 0x41, reg_val|0x80);
-               pci_read_config_byte(pdev, 0x43, &reg_val);
-               pci_write_config_byte(pdev, 0x43, reg_val|0x80);
+               pci_read_config_byte(pdev, PIIX4_FUNC1_IDETIM_PRIMARY_HI,
+                       &reg_val);
+               pci_write_config_byte(pdev, PIIX4_FUNC1_IDETIM_PRIMARY_HI,
+                       reg_val|PIIX4_FUNC1_IDETIM_PRIMARY_HI_IDE_DECODE_EN);
+               pci_read_config_byte(pdev, PIIX4_FUNC1_IDETIM_SECONDARY_HI,
+                       &reg_val);
+               pci_write_config_byte(pdev, PIIX4_FUNC1_IDETIM_SECONDARY_HI,
+                       reg_val|PIIX4_FUNC1_IDETIM_SECONDARY_HI_IDE_DECODE_EN);
        }
 }
 
@@ -108,10 +116,12 @@ static void quirk_dlcsetup(struct pci_dev *dev)
 {
        u8 odlc, ndlc;
 
-       (void) pci_read_config_byte(dev, 0x82, &odlc);
+       (void) pci_read_config_byte(dev, PIIX4_FUNC0_DLC, &odlc);
        /* Enable passive releases and delayed transaction */
-       ndlc = odlc | 7;
-       (void) pci_write_config_byte(dev, 0x82, ndlc);
+       ndlc = odlc | PIIX4_FUNC0_DLC_USBPR_EN |
+                     PIIX4_FUNC0_DLC_PASSIVE_RELEASE_EN |
+                     PIIX4_FUNC0_DLC_DELAYED_TRANSACTION_EN;
+       (void) pci_write_config_byte(dev, PIIX4_FUNC0_DLC, ndlc);
 }
 
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,