[POWERPC] QE: Add support for Freescale QUICCEngine UART

[karo-tx-linux.git] / arch / powerpc / boot / dts / mpc832x_mds.dts

diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 5093ef304ff044fddb9524009ee97313b20bd110..690252456d3d5b02529afb62eb7791bc8fecbe97 100644 (file)
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -7,6 +7,18 @@
  * under  the terms of  the GNU General  Public License as published by the
  * Free Software Foundation;  either version 2 of the  License, or (at your
  * option) any later version.
+
+ * To enable external serial I/O on a Freescale MPC 8323 SYS/MDS board, do
+ * this:
+ *
+ * 1) On chip U61, lift (disconnect) pins 21 (TXD) and 22 (RXD) from the board.
+ * 2) Solder a wire from U61-21 to P19A-23.  P19 is a grid of pins on the board
+ *    next to the serial ports.
+ * 3) Solder a wire from U61-22 to P19K-22.
+ *
+ * Note that there's a typo in the schematic.  The board labels the last column
+ * of pins "P19K", but in the schematic, that column is called "P19J".  So if
+ * you're going by the schematic, the pin is called "P19J-K22".
  */
 
 / {
@@ -169,6 +181,23 @@
                                        1 1e  1  0  1  0        /* TX_EN */
                                        1 1f  2  0  1  0>;/* CRS */
                        };
+                       pio5: ucc_pin@05 {
+                               pio-map = <
+                               /*
+                                *                    open       has
+                                *   port  pin  dir  drain  sel  irq
+                                */
+                                       2    0    1      0    2    0  /* TxD5 */
+                                       2    8    2      0    2    0  /* RxD5 */
+
+                                       2   1d    2      0    0    0  /* CTS5 */
+                                       2   1f    1      0    2    0  /* RTS5 */
+
+                                       2   18    2      0    0    0  /* CD */
+
+                               >;
+                       };
+
                };
        };
 
@@ -176,6 +205,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                device_type = "qe";
+               compatible = "fsl,qe";
                model = "QE";
                ranges = <0 e0100000 00100000>;
                reg = <e0100000 480>;
@@ -249,6 +279,26 @@
                        pio-handle = < &pio4 >;
                };
 
+               ucc@2400 {
+                       device_type = "serial";
+                       compatible = "ucc_uart";
+                       model = "UCC";
+                       device-id = <5>;        /* The UCC number, 1-7*/
+                       port-number = <0>;      /* Which ttyQEx device */
+                       soft-uart;              /* We need Soft-UART */
+                       reg = <2400 200>;
+                       interrupts = <28>;      /* From Table 18-12 */
+                       interrupt-parent = < &qeic >;
+                       /*
+                        * For Soft-UART, we need to set TX to 1X, which
+                        * means specifying separate clock sources.
+                        */
+                       rx-clock-name = "brg5";
+                       tx-clock-name = "brg6";
+                       pio-handle = < &pio5 >;
+               };
+
+
                mdio@2320 {
                        #address-cells = <1>;
                        #size-cells = <0>;