powerpc: Remove warm reset entry point

[karo-tx-uboot.git] / arch / powerpc / cpu / mpc83xx / start.S

diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index a7c80792ded4dc54f6e87a73421be44b11b88140..bdce91581cd8664e65212b6248aa65d9fdccbc71 100644 (file)
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -183,22 +183,9 @@ ppcDWload:
 
        .globl  _start
 _start: /* time t 0 */
-       li      r21, BOOTFLAG_COLD  /* Normal Power-On: Boot from FLASH*/
-       nop
-       b       boot_cold
-
-       . = EXC_OFF_SYS_RESET + 0x10
-
-       .globl  _start_warm
-_start_warm:
-       li      r21, BOOTFLAG_WARM      /* Software reboot      */
-       b       boot_warm
-
-
-boot_cold: /* time t 3 */
        lis     r4, CONFIG_DEFAULT_IMMR@h
        nop
-boot_warm: /* time t 5 */
+
        mfmsr   r5                      /* save msr contents    */
 
        /* 83xx manuals prescribe a specific sequence for updating IMMRBAR. */
@@ -302,11 +289,11 @@ in_flash:
        /* run low-level CPU init code (in Flash)*/
        bl      cpu_init_f
 
-       /* r3: BOOTFLAG */
-       mr      r3, r21
        /* run 1st part of board init code (in Flash)*/
        bl      board_init_f
 
+       /* NOTREACHED - board_init_f() does not return */
+
 #ifndef CONFIG_NAND_SPL
 /*
  * Vector Table
@@ -507,7 +494,7 @@ init_e300_core: /* time t 10 */
 
        lis     r3, CONFIG_SYS_IMMR@h
 #if defined(CONFIG_WATCHDOG)
-       /* Initialise the Wathcdog values and reset it (if req) */
+       /* Initialise the Watchdog values and reset it (if req) */
        /*------------------------------------------------------*/
        lis r4, CONFIG_SYS_WATCHDOG_VALUE
        ori r4, r4, (SWCRR_SWEN | SWCRR_SWRI | SWCRR_SWPR)
@@ -520,7 +507,7 @@ init_e300_core: /* time t 10 */
        li      r4, -0x55C7
        sth     r4, SWSRR@l(r3)
 #else
-       /* Disable Wathcdog  */
+       /* Disable Watchdog  */
        /*-------------------*/
        lwz r4, SWCRR(r3)
        /* Check to see if its enabled for disabling
@@ -739,6 +726,7 @@ setup_bats:
  * Note: requires that all cache bits in
  * HID0 are in the low half word.
  */
+#ifndef CONFIG_NAND_SPL
        .globl  icache_enable
 icache_enable:
        mfspr   r3, HID0
@@ -767,6 +755,7 @@ icache_status:
        mfspr   r3, HID0
        rlwinm  r3, r3, (31 - HID0_ICE_SHIFT + 1), 31, 31
        blr
+#endif /* !CONFIG_NAND_SPL */
 
        .globl  dcache_enable
 dcache_enable: