]> git.karo-electronics.de Git - karo-tx-uboot.git/blobdiff - arch/powerpc/cpu/mpc85xx/cpu.c
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
[karo-tx-uboot.git] / arch / powerpc / cpu / mpc85xx / cpu.c
index 91ac4ee617b6fc51e9e1b95358a5df5825e1700d..1a0196c7c421db4924c9531c55574b4b467696af 100644 (file)
@@ -44,10 +44,10 @@ int checkcpu (void)
        uint major, minor;
        struct cpu_type *cpu;
        char buf1[32], buf2[32];
-#if (defined(CONFIG_DDR_CLK_FREQ) || \
-       defined(CONFIG_FSL_CORENET)) && !defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2)
-       volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-#endif /* CONFIG_FSL_CORENET */
+#if defined(CONFIG_DDR_CLK_FREQ) || defined(CONFIG_FSL_CORENET)
+       ccsr_gur_t __iomem *gur =
+               (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+#endif
 
        /*
         * Cornet platforms use ddr sync bit in RCW to indicate sync vs async
@@ -135,81 +135,97 @@ int checkcpu (void)
                if (!(i & 3))
                        printf ("\n       ");
                printf("CPU%d:%-4s MHz, ", core,
-                       strmhz(buf1, sysinfo.freqProcessor[core]));
+                       strmhz(buf1, sysinfo.freq_processor[core]));
        }
-       printf("\n       CCB:%-4s MHz,\n", strmhz(buf1, sysinfo.freqSystemBus));
+       printf("\n       CCB:%-4s MHz,", strmhz(buf1, sysinfo.freq_systembus));
+       printf("\n");
 
 #ifdef CONFIG_FSL_CORENET
        if (ddr_sync == 1) {
                printf("       DDR:%-4s MHz (%s MT/s data rate) "
                        "(Synchronous), ",
-                       strmhz(buf1, sysinfo.freqDDRBus/2),
-                       strmhz(buf2, sysinfo.freqDDRBus));
+                       strmhz(buf1, sysinfo.freq_ddrbus/2),
+                       strmhz(buf2, sysinfo.freq_ddrbus));
        } else {
                printf("       DDR:%-4s MHz (%s MT/s data rate) "
                        "(Asynchronous), ",
-                       strmhz(buf1, sysinfo.freqDDRBus/2),
-                       strmhz(buf2, sysinfo.freqDDRBus));
+                       strmhz(buf1, sysinfo.freq_ddrbus/2),
+                       strmhz(buf2, sysinfo.freq_ddrbus));
        }
 #else
        switch (ddr_ratio) {
        case 0x0:
                printf("       DDR:%-4s MHz (%s MT/s data rate), ",
-                       strmhz(buf1, sysinfo.freqDDRBus/2),
-                       strmhz(buf2, sysinfo.freqDDRBus));
+                       strmhz(buf1, sysinfo.freq_ddrbus/2),
+                       strmhz(buf2, sysinfo.freq_ddrbus));
                break;
        case 0x7:
                printf("       DDR:%-4s MHz (%s MT/s data rate) "
                        "(Synchronous), ",
-                       strmhz(buf1, sysinfo.freqDDRBus/2),
-                       strmhz(buf2, sysinfo.freqDDRBus));
+                       strmhz(buf1, sysinfo.freq_ddrbus/2),
+                       strmhz(buf2, sysinfo.freq_ddrbus));
                break;
        default:
                printf("       DDR:%-4s MHz (%s MT/s data rate) "
                        "(Asynchronous), ",
-                       strmhz(buf1, sysinfo.freqDDRBus/2),
-                       strmhz(buf2, sysinfo.freqDDRBus));
+                       strmhz(buf1, sysinfo.freq_ddrbus/2),
+                       strmhz(buf2, sysinfo.freq_ddrbus));
                break;
        }
 #endif
 
 #if defined(CONFIG_FSL_LBC)
-       if (sysinfo.freqLocalBus > LCRR_CLKDIV) {
-               printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus));
+       if (sysinfo.freq_localbus > LCRR_CLKDIV) {
+               printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freq_localbus));
        } else {
                printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n",
-                      sysinfo.freqLocalBus);
+                      sysinfo.freq_localbus);
        }
 #endif
 
 #if defined(CONFIG_FSL_IFC)
-       printf("IFC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus));
+       printf("IFC:%-4s MHz\n", strmhz(buf1, sysinfo.freq_localbus));
 #endif
 
 #ifdef CONFIG_CPM2
-       printf("CPM:   %s MHz\n", strmhz(buf1, sysinfo.freqSystemBus));
+       printf("CPM:   %s MHz\n", strmhz(buf1, sysinfo.freq_systembus));
 #endif
 
 #ifdef CONFIG_QE
-       printf("       QE:%-4s MHz\n", strmhz(buf1, sysinfo.freqQE));
+       printf("       QE:%-4s MHz\n", strmhz(buf1, sysinfo.freq_qe));
 #endif
 
 #ifdef CONFIG_SYS_DPAA_FMAN
        for (i = 0; i < CONFIG_SYS_NUM_FMAN; i++) {
                printf("       FMAN%d: %s MHz\n", i + 1,
-                       strmhz(buf1, sysinfo.freqFMan[i]));
+                       strmhz(buf1, sysinfo.freq_fman[i]));
        }
 #endif
 
 #ifdef CONFIG_SYS_DPAA_QBMAN
-       printf("       QMAN:  %s MHz\n", strmhz(buf1, sysinfo.freqQMAN));
+       printf("       QMAN:  %s MHz\n", strmhz(buf1, sysinfo.freq_qman));
 #endif
 
 #ifdef CONFIG_SYS_DPAA_PME
-       printf("       PME:   %s MHz\n", strmhz(buf1, sysinfo.freqPME));
+       printf("       PME:   %s MHz\n", strmhz(buf1, sysinfo.freq_pme));
 #endif
 
-       puts("L1:    D-cache 32 kB enabled\n       I-cache 32 kB enabled\n");
+       puts("L1:    D-cache 32 KiB enabled\n       I-cache 32 KiB enabled\n");
+
+#ifdef CONFIG_FSL_CORENET
+       /* Display the RCW, so that no one gets confused as to what RCW
+        * we're actually using for this boot.
+        */
+       puts("Reset Configuration Word (RCW):");
+       for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
+               u32 rcw = in_be32(&gur->rcwsr[i]);
+
+               if ((i % 4) == 0)
+                       printf("\n       %08x:", i * 4);
+               printf(" %08x", rcw);
+       }
+       puts("\n");
+#endif
 
        return 0;
 }