* MA 02111-1307 USA
*/
+#include "config.h" /* CONFIG_BOARDDIR */
+
OUTPUT_ARCH(powerpc)
SECTIONS
{
. = 0xfff00000;
.text : {
- *(.text)
+ *(.text*)
}
_etext = .;
.reloc : {
_GOT2_TABLE_ = .;
- *(.got2)
+ KEEP(*(.got2))
+ KEEP(*(.got))
+ PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
_FIXUP_TABLE_ = .;
- *(.fixup)
+ KEEP(*(.fixup))
}
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+ __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
__fixup_entries = (. - _FIXUP_TABLE_) >> 2;
. = ALIGN(8);
}
_edata = .;
+ .u_boot_list : {
+ #include <u-boot.lst>
+ }
+
. = ALIGN(8);
__init_begin = .;
__init_end = .;
-
- .resetvec ADDR(.text) + 0xffc : {
- *(.resetvec)
+#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
+ .bootpg ADDR(.text) + 0x1000 :
+ {
+ start.o (.bootpg)
+ }
+#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
+#elif defined(CONFIG_FSL_ELBC)
+#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
+#else
+#error unknown NAND controller
+#endif
+ .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
+ KEEP(*(.resetvec))
} = 0xffff
__bss_start = .;
.bss : {
- *(.sbss)
- *(.bss)
+ *(.sbss*)
+ *(.bss*)
}
- _end = .;
+ __bss_end__ = .;
}
-ASSERT(__init_end <= 0xfff00ffc, "NAND bootstrap too big");
+ASSERT(__init_end <= (0xfff00000 + RESET_VECTOR_OFFSET), "NAND bootstrap too big");