Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux...

[karo-tx-linux.git] / arch / powerpc / include / asm / reg.h

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 4852bcf270f37a30b68519e8b0ce3b52c5fe7d8c..bffd89d27301db29594688225eb83b1033f5d2e2 100644 (file)
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -215,6 +215,7 @@
 #define SPRN_TEXASR    0x82    /* Transaction EXception & Summary */
 #define   TEXASR_FS    __MASK(63-36)   /* Transaction Failure Summary */
 #define SPRN_TEXASRU   0x83    /* ''      ''      ''    Upper 32  */
+#define   TEXASR_FS     __MASK(63-36) /* TEXASR Failure Summary */
 #define SPRN_TFHAR     0x80    /* Transaction Failure Handler Addr */
 #define SPRN_CTRLF     0x088
 #define SPRN_CTRLT     0x098
@@ -224,6 +225,7 @@
 #define   CTRL_TE      0x00c00000      /* thread enable */
 #define   CTRL_RUNLATCH        0x1
 #define SPRN_DAWR      0xB4
+#define SPRN_RPR       0xBA    /* Relative Priority Register */
 #define SPRN_CIABR     0xBB
 #define   CIABR_PRIV           0x3
 #define   CIABR_PRIV_USER      1
@@ -272,8 +274,10 @@
 #define SPRN_HSRR1     0x13B   /* Hypervisor Save/Restore 1 */
 #define SPRN_IC                0x350   /* Virtual Instruction Count */
 #define SPRN_VTB       0x351   /* Virtual Time Base */
+#define SPRN_LDBAR     0x352   /* LD Base Address Register */
 #define SPRN_PMICR     0x354   /* Power Management Idle Control Reg */
 #define SPRN_PMSR      0x355   /* Power Management Status Reg */
+#define SPRN_PMMAR     0x356   /* Power Management Memory Activity Register */
 #define SPRN_PMCR      0x374   /* Power Management Control Register */
 
 /* HFSCR and FSCR bit numbers are the same */
@@ -433,6 +437,12 @@
 #define HID0_BTCD      (1<<1)          /* Branch target cache disable */
 #define HID0_NOPDST    (1<<1)          /* No-op dst, dstt, etc. instr. */
 #define HID0_NOPTI     (1<<0)          /* No-op dcbt and dcbst instr. */
+/* POWER8 HID0 bits */
+#define HID0_POWER8_4LPARMODE  __MASK(61)
+#define HID0_POWER8_2LPARMODE  __MASK(57)
+#define HID0_POWER8_1TO2LPAR   __MASK(52)
+#define HID0_POWER8_1TO4LPAR   __MASK(51)
+#define HID0_POWER8_DYNLPARDIS __MASK(48)
 
 #define SPRN_HID1      0x3F1           /* Hardware Implementation Register 1 */
 #ifdef CONFIG_6xx