* Disable all counters to prevent PMU interrupts and to allow
* counters to be added or removed.
*/
-u64 hw_perf_save_disable(void)
+void hw_perf_disable(void)
{
struct cpu_hw_counters *cpuhw;
unsigned long ret;
mb();
}
local_irq_restore(flags);
- return ret;
}
/*
* If we were previously disabled and counters were added, then
* put the new config on the PMU.
*/
-void hw_perf_restore(u64 disable)
+void hw_perf_enable(void)
{
struct perf_counter *counter;
struct cpu_hw_counters *cpuhw;
int n_lim;
int idx;
- if (disable)
- return;
local_irq_save(flags);
+ if (!cpuhw->disabled) {
+ local_irq_restore(flags);
+ return;
+ }
+
cpuhw = &__get_cpu_var(cpu_hw_counters);
cpuhw->disabled = 0;
/*
* Add a counter to the PMU.
* If all counters are not already frozen, then we disable and
- * re-enable the PMU in order to get hw_perf_restore to do the
+ * re-enable the PMU in order to get hw_perf_enable to do the
* actual work of reconfiguring the PMU.
*/
static int power_pmu_enable(struct perf_counter *counter)
{
struct cpu_hw_counters *cpuhw;
unsigned long flags;
- u64 pmudis;
int n0;
int ret = -EAGAIN;
local_irq_save(flags);
- pmudis = hw_perf_save_disable();
+ perf_disable();
/*
* Add the counter to the list (if there is room)
ret = 0;
out:
- hw_perf_restore(pmudis);
+ perf_enable();
local_irq_restore(flags);
return ret;
}
{
struct cpu_hw_counters *cpuhw;
long i;
- u64 pmudis;
unsigned long flags;
local_irq_save(flags);
- pmudis = hw_perf_save_disable();
+ perf_disable();
power_pmu_read(counter);
cpuhw->mmcr[0] &= ~(MMCR0_PMXE | MMCR0_FCECE);
}
- hw_perf_restore(pmudis);
+ perf_enable();
local_irq_restore(flags);
}