#include <asm/uaccess.h>
#include <asm/reg.h>
-#include "sfp-machine.h"
-#include "double.h"
+#include <asm/sfp-machine.h>
+#include <math-emu/double.h>
#define FLOATFUNC(x) extern int x(void *, void *, void *, void *)
fpscr |= FPSCR_ZX;
if (eflag & EFLAG_INEXACT)
fpscr |= FPSCR_XX;
+ if (eflag & EFLAG_INVALID)
+ fpscr |= FPSCR_VX;
if (eflag & EFLAG_VXSNAN)
fpscr |= FPSCR_VXSNAN;
if (eflag & EFLAG_VXISI)
fpscr |= FPSCR_VXCVI;
}
- fpscr &= ~(FPSCR_VX);
+// fpscr &= ~(FPSCR_VX);
if (fpscr & (FPSCR_VXSNAN | FPSCR_VXISI | FPSCR_VXIDI |
FPSCR_VXZDZ | FPSCR_VXIMZ | FPSCR_VXVC |
FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI))
case LFD:
idx = (insn >> 16) & 0x1f;
sdisp = (insn & 0xffff);
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
lfd(op0, op1, op2, op3);
break;
case LFDU:
idx = (insn >> 16) & 0x1f;
sdisp = (insn & 0xffff);
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
lfd(op0, op1, op2, op3);
regs->gpr[idx] = (unsigned long)op1;
case STFD:
idx = (insn >> 16) & 0x1f;
sdisp = (insn & 0xffff);
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
stfd(op0, op1, op2, op3);
break;
case STFDU:
idx = (insn >> 16) & 0x1f;
sdisp = (insn & 0xffff);
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
stfd(op0, op1, op2, op3);
regs->gpr[idx] = (unsigned long)op1;
break;
case OP63:
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f);
fmr(op0, op1, op2, op3);
break;
default:
switch (type) {
case AB:
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f];
- op2 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f);
+ op2 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f);
break;
case AC:
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f];
- op2 = (void *)¤t->thread.fpr[(insn >> 6) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f);
+ op2 = (void *)¤t->thread.TS_FPR((insn >> 6) & 0x1f);
break;
case ABC:
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f];
- op2 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f];
- op3 = (void *)¤t->thread.fpr[(insn >> 6) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f);
+ op2 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f);
+ op3 = (void *)¤t->thread.TS_FPR((insn >> 6) & 0x1f);
break;
case D:
idx = (insn >> 16) & 0x1f;
sdisp = (insn & 0xffff);
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
break;
goto illegal;
sdisp = (insn & 0xffff);
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)(regs->gpr[idx] + sdisp);
break;
case X:
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
break;
case XA:
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f);
break;
case XB:
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f);
break;
case XE:
idx = (insn >> 16) & 0x1f;
- if (!idx)
- goto illegal;
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
+ if (!idx) {
+ if (((insn >> 1) & 0x3ff) == STFIWX)
+ op1 = (void *)(regs->gpr[(insn >> 11) & 0x1f]);
+ else
+ goto illegal;
+ } else {
+ op1 = (void *)(regs->gpr[idx] + regs->gpr[(insn >> 11) & 0x1f]);
+ }
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)(regs->gpr[idx] + regs->gpr[(insn >> 11) & 0x1f]);
break;
case XEU:
idx = (insn >> 16) & 0x1f;
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0)
+ regs->gpr[(insn >> 11) & 0x1f]);
break;
case XCR:
op0 = (void *)®s->ccr;
op1 = (void *)((insn >> 23) & 0x7);
- op2 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f];
- op3 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f];
+ op2 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f);
+ op3 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f);
break;
case XCRL:
case XFLB:
op0 = (void *)((insn >> 17) & 0xff);
- op1 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f];
+ op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f);
break;
default: