#include "iommu.h"
+static dma_addr_t cell_dma_valid = SPIDER_DMA_VALID;
+
static inline unsigned long
get_iopt_entry(unsigned long real_address, unsigned long ioid,
unsigned long prot)
set_iost_origin(mmio_base);
}
-static void iommu_dev_setup_null(struct pci_dev *d) { }
-static void iommu_bus_setup_null(struct pci_bus *b) { }
-
struct cell_iommu {
unsigned long base;
unsigned long mmio_base;
}
}
-static void iommu_devnode_setup(struct device_node *d)
+static void pci_dma_cell_bus_setup(struct pci_bus *b)
{
const unsigned int *ioid;
unsigned long map_start, map_size, token;
const unsigned long *dma_window;
struct cell_iommu *iommu;
+ struct device_node *d;
+
+ d = pci_bus_to_OF_node(b);
ioid = get_property(d, "ioid", NULL);
if (!ioid)
cell_do_map_iommu(iommu, *ioid, map_start, map_size);
}
-static void iommu_bus_setup(struct pci_bus *b)
-{
- struct device_node *d = (struct device_node *)b->sysdata;
- iommu_devnode_setup(d);
-}
-
static int cell_map_iommu_hardcoded(int num_nodes)
{
/* node 0 */
iommu = &cell_iommus[0];
- iommu->mapped_base = ioremap(0x20000511000, 0x1000);
- iommu->mapped_mmio_base = ioremap(0x20000510000, 0x1000);
+ iommu->mapped_base = ioremap(0x20000511000ul, 0x1000);
+ iommu->mapped_mmio_base = ioremap(0x20000510000ul, 0x1000);
enable_mapping(iommu->mapped_base, iommu->mapped_mmio_base);
/* node 1 */
iommu = &cell_iommus[1];
- iommu->mapped_base = ioremap(0x30000511000, 0x1000);
- iommu->mapped_mmio_base = ioremap(0x30000510000, 0x1000);
+ iommu->mapped_base = ioremap(0x30000511000ul, 0x1000);
+ iommu->mapped_mmio_base = ioremap(0x30000510000ul, 0x1000);
enable_mapping(iommu->mapped_base, iommu->mapped_mmio_base);
ret = (void *)__get_free_pages(flag, get_order(size));
if (ret != NULL) {
memset(ret, 0, size);
- *dma_handle = virt_to_abs(ret) | CELL_DMA_VALID;
+ *dma_handle = virt_to_abs(ret) | cell_dma_valid;
}
return ret;
}
static dma_addr_t cell_map_single(struct device *hwdev, void *ptr,
size_t size, enum dma_data_direction direction)
{
- return virt_to_abs(ptr) | CELL_DMA_VALID;
+ return virt_to_abs(ptr) | cell_dma_valid;
}
static void cell_unmap_single(struct device *hwdev, dma_addr_t dma_addr,
for (i = 0; i < nents; i++, sg++) {
sg->dma_address = (page_to_phys(sg->page) + sg->offset)
- | CELL_DMA_VALID;
+ | cell_dma_valid;
sg->dma_length = sg->length;
}
{
int setup_bus = 0;
+ /* If we have an Axon bridge, clear the DMA valid mask. This is fairly
+ * hackish but will work well enough until we have proper iommu code.
+ */
+ if (of_find_node_by_name(NULL, "axon"))
+ cell_dma_valid = 0;
+
if (of_find_node_by_path("/mambo")) {
pr_info("Not using iommu on systemsim\n");
} else {
if (setup_bus) {
pr_debug("%s: IOMMU mapping activated\n", __FUNCTION__);
- ppc_md.iommu_dev_setup = iommu_dev_setup_null;
- ppc_md.iommu_bus_setup = iommu_bus_setup;
+ ppc_md.pci_dma_bus_setup = pci_dma_cell_bus_setup;
} else {
pr_debug("%s: IOMMU mapping activated, "
"no device action necessary\n", __FUNCTION__);
/* Direct I/O, IOMMU off */
- ppc_md.iommu_dev_setup = iommu_dev_setup_null;
- ppc_md.iommu_bus_setup = iommu_bus_setup_null;
}
}
- pci_dma_ops = cell_iommu_ops;
+ pci_dma_ops = &cell_iommu_ops;
}