sh: Mass ctrl_in/outX to __raw_read/writeX conversion.

[mv-sheeva.git] / arch / sh / boards / mach-se / 7722 / setup.c

diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index 93675418171d7d9df596a657bccdf0d7a4a0b350..80a4e571b310f99e79c04f991236ef92c1d232be 100644 (file)
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -156,32 +156,32 @@ device_initcall(se7722_devices_setup);
 
 static void __init se7722_setup(char **cmdline_p)
 {
-       ctrl_outw(0x010D, FPGA_OUT);    /* FPGA */
+       __raw_writew(0x010D, FPGA_OUT);    /* FPGA */
 
-       ctrl_outw(0x0000, PORT_PECR);   /* PORT E 1 = IRQ5 ,E 0 = BS */
-       ctrl_outw(0x1000, PORT_PJCR);   /* PORT J 1 = IRQ1,J 0 =IRQ0 */
+       __raw_writew(0x0000, PORT_PECR);   /* PORT E 1 = IRQ5 ,E 0 = BS */
+       __raw_writew(0x1000, PORT_PJCR);   /* PORT J 1 = IRQ1,J 0 =IRQ0 */
 
        /* LCDC I/O */
-       ctrl_outw(0x0020, PORT_PSELD);
+       __raw_writew(0x0020, PORT_PSELD);
 
        /* SIOF1*/
-       ctrl_outw(0x0003, PORT_PSELB);
-       ctrl_outw(0xe000, PORT_PSELC);
-       ctrl_outw(0x0000, PORT_PKCR);
+       __raw_writew(0x0003, PORT_PSELB);
+       __raw_writew(0xe000, PORT_PSELC);
+       __raw_writew(0x0000, PORT_PKCR);
 
        /* LCDC */
-       ctrl_outw(0x4020, PORT_PHCR);
-       ctrl_outw(0x0000, PORT_PLCR);
-       ctrl_outw(0x0000, PORT_PMCR);
-       ctrl_outw(0x0002, PORT_PRCR);
-       ctrl_outw(0x0000, PORT_PXCR);   /* LCDC,CS6A */
+       __raw_writew(0x4020, PORT_PHCR);
+       __raw_writew(0x0000, PORT_PLCR);
+       __raw_writew(0x0000, PORT_PMCR);
+       __raw_writew(0x0002, PORT_PRCR);
+       __raw_writew(0x0000, PORT_PXCR);   /* LCDC,CS6A */
 
        /* KEYSC */
-       ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */
-       ctrl_outw(0x0000, PORT_PYCR);
-       ctrl_outw(0x0000, PORT_PZCR);
-       ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
-       ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
+       __raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */
+       __raw_writew(0x0000, PORT_PYCR);
+       __raw_writew(0x0000, PORT_PZCR);
+       __raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
+       __raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
 }
 
 /*