struct cpufreq_frequency_table *freq_table,
unsigned long rate);
-#define SH_CLK_MSTP32(_name, _id, _parent, _enable_reg, \
- _enable_bit, _flags) \
-{ \
- .name = _name, \
- .id = _id, \
- .parent = _parent, \
- .enable_reg = (void __iomem *)_enable_reg, \
- .enable_bit = _enable_bit, \
- .flags = _flags, \
+#define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \
+{ \
+ .parent = _parent, \
+ .enable_reg = (void __iomem *)_enable_reg, \
+ .enable_bit = _enable_bit, \
+ .flags = _flags, \
}
int sh_clk_mstp32_register(struct clk *clks, int nr);
int sh_clk_div4_reparent_register(struct clk *clks, int nr,
struct clk_div4_table *table);
-#define SH_CLK_DIV6(_name, _parent, _reg, _flags) \
-{ \
- .name = _name, \
- .parent = _parent, \
- .enable_reg = (void __iomem *)_reg, \
- .flags = _flags, \
+#define SH_CLK_DIV6(_parent, _reg, _flags) \
+{ \
+ .parent = _parent, \
+ .enable_reg = (void __iomem *)_reg, \
+ .flags = _flags, \
}
int sh_clk_div6_register(struct clk *clks, int nr);