sh: remove duplicated #include

[mv-sheeva.git] / arch / sh / kernel / cpu / sh4a / clock-sh7786.c

diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index f00b89f86a247a44fa93fac2b2140faa00aed54f..597c9fbe49c6d88e45a248c424400422e949188f 100644 (file)
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -13,7 +13,6 @@
 #include <linux/kernel.h>
 #include <linux/clk.h>
 #include <linux/io.h>
-#include <linux/clk.h>
 #include <asm/clkdev.h>
 #include <asm/clock.h>
 #include <asm/freq.h>
@@ -23,8 +22,6 @@
  * from the platform code.
  */
 static struct clk extal_clk = {
-       .name           = "extal",
-       .id             = -1,
        .rate           = 33333333,
 };
 
@@ -46,8 +43,6 @@ static struct clk_ops pll_clk_ops = {
 };
 
 static struct clk pll_clk = {
-       .name           = "pll_clk",
-       .id             = -1,
        .ops            = &pll_clk_ops,
        .parent         = &extal_clk,
        .flags          = CLK_ENABLE_ON_INIT,
@@ -72,16 +67,16 @@ static struct clk_div4_table div4_table = {
 
 enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_DU, DIV4_P, DIV4_NR };
 
-#define DIV4(_str, _bit, _mask, _flags) \
-  SH_CLK_DIV4(_str, &pll_clk, FRQMR1, _bit, _mask, _flags)
+#define DIV4(_bit, _mask, _flags) \
+  SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
 
 struct clk div4_clks[DIV4_NR] = {
-       [DIV4_P] = DIV4("peripheral_clk", 0, 0x0b40, 0),
-       [DIV4_DU] = DIV4("du_clk", 4, 0x0010, 0),
-       [DIV4_DDR] = DIV4("ddr_clk", 12, 0x0002, CLK_ENABLE_ON_INIT),
-       [DIV4_B] = DIV4("bus_clk", 16, 0x0360, CLK_ENABLE_ON_INIT),
-       [DIV4_SH] = DIV4("shyway_clk", 20, 0x0002, CLK_ENABLE_ON_INIT),
-       [DIV4_I] = DIV4("cpu_clk", 28, 0x0006, CLK_ENABLE_ON_INIT),
+       [DIV4_P] = DIV4(0, 0x0b40, 0),
+       [DIV4_DU] = DIV4(4, 0x0010, 0),
+       [DIV4_DDR] = DIV4(12, 0x0002, CLK_ENABLE_ON_INIT),
+       [DIV4_B] = DIV4(16, 0x0360, CLK_ENABLE_ON_INIT),
+       [DIV4_SH] = DIV4(20, 0x0002, CLK_ENABLE_ON_INIT),
+       [DIV4_I] = DIV4(28, 0x0006, CLK_ENABLE_ON_INIT),
 };
 
 #define MSTPCR0                0xffc40030
@@ -133,6 +128,10 @@ static struct clk mstp_clks[MSTP_NR] = {
 #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 
 static struct clk_lookup lookups[] = {
+       /* main clocks */
+       CLKDEV_CON_ID("extal", &extal_clk),
+       CLKDEV_CON_ID("pll_clk", &pll_clk),
+
        /* DIV4 clocks */
        CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
        CLKDEV_CON_ID("du_clk", &div4_clks[DIV4_DU]),