Merge branch 'tracing-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

[mv-sheeva.git] / arch / sh / mm / tlb-sh4.c

diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index f0c7b7397fa655804e59f161ffbf48ad37a801fd..8cf550e2570fde753a8405e77c722f9b5fc13032 100644 (file)
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -15,34 +15,16 @@
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 
-void update_mmu_cache(struct vm_area_struct * vma,
-                     unsigned long address, pte_t pte)
+void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
 {
-       unsigned long flags;
-       unsigned long pteval;
-       unsigned long vpn;
+       unsigned long flags, pteval, vpn;
 
-       /* Ptrace may call this routine. */
+       /*
+        * Handle debugger faulting in for debugee.
+        */
        if (vma && current->active_mm != vma->vm_mm)
                return;
 
-#ifndef CONFIG_CACHE_OFF
-       {
-               unsigned long pfn = pte_pfn(pte);
-
-               if (pfn_valid(pfn)) {
-                       struct page *page = pfn_to_page(pfn);
-
-                       if (!test_bit(PG_mapped, &page->flags)) {
-                               unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
-                               __flush_wback_region((void *)P1SEGADDR(phys),
-                                                    PAGE_SIZE);
-                               __set_bit(PG_mapped, &page->flags);
-                       }
-               }
-       }
-#endif
-
        local_irq_save(flags);
 
        /* Set PTEH register */
@@ -61,9 +43,12 @@ void update_mmu_cache(struct vm_area_struct * vma,
         */
        ctrl_outl(pte.pte_high, MMU_PTEA);
 #else
-       if (cpu_data->flags & CPU_HAS_PTEA)
-               /* TODO: make this look less hacky */
-               ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA);
+       if (cpu_data->flags & CPU_HAS_PTEA) {
+               /* The last 3 bits and the first one of pteval contains
+                * the PTEA timing control and space attribute bits
+                */
+               ctrl_outl(copy_ptea_attributes(pteval), MMU_PTEA);
+       }
 #endif
 
        /* Set PTEL register */