x86, AMD: Enable WC+ memory type on family 10 processors

[karo-tx-linux.git] / arch / x86 / include / uapi / asm / msr-index.h

diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h
index 433a59fb1a7411b97cd0db54d30a3bc727a4aeea..158cde98bbc3a3de06a5cfa10766bf0d1ccae1f5 100644 (file)
--- a/arch/x86/include/uapi/asm/msr-index.h
+++ b/arch/x86/include/uapi/asm/msr-index.h
@@ -173,6 +173,7 @@
 #define MSR_AMD64_OSVW_ID_LENGTH       0xc0010140
 #define MSR_AMD64_OSVW_STATUS          0xc0010141
 #define MSR_AMD64_DC_CFG               0xc0011022
+#define MSR_AMD64_BU_CFG2              0xc001102a
 #define MSR_AMD64_IBSFETCHCTL          0xc0011030
 #define MSR_AMD64_IBSFETCHLINAD                0xc0011031
 #define MSR_AMD64_IBSFETCHPHYSAD       0xc0011032