x86, Intel: Convert to the new bit access MSR accessors

[karo-tx-linux.git] / arch / x86 / include / uapi / asm / msr-index.h

diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h
index c19fc60ff06272f733df17a03f8cbf577d69073f..045e6db6f58ad2dbba76eb4657e9d4cea52840d4 100644 (file)
--- a/arch/x86/include/uapi/asm/msr-index.h
+++ b/arch/x86/include/uapi/asm/msr-index.h
@@ -368,14 +368,16 @@
 #define THERM_LOG_THRESHOLD1           (1 << 9)
 
 /* MISC_ENABLE bits: architectural */
-#define MSR_IA32_MISC_ENABLE_FAST_STRING       (1ULL << 0)
+#define MSR_BIT_FAST_STRING                            0
+#define MSR_IA32_MISC_ENABLE_FAST_STRING       (1ULL << MSR_BIT_FAST_STRING)
 #define MSR_IA32_MISC_ENABLE_TCC               (1ULL << 1)
 #define MSR_IA32_MISC_ENABLE_EMON              (1ULL << 7)
 #define MSR_IA32_MISC_ENABLE_BTS_UNAVAIL       (1ULL << 11)
 #define MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL      (1ULL << 12)
 #define MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP        (1ULL << 16)
 #define MSR_IA32_MISC_ENABLE_MWAIT             (1ULL << 18)
-#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID       (1ULL << 22)
+#define MSR_BIT_LIMIT_CPUID                            22
+#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID       (1ULL << MSR_BIT_LIMIT_CPUID);
 #define MSR_IA32_MISC_ENABLE_XTPR_DISABLE      (1ULL << 23)
 #define MSR_IA32_MISC_ENABLE_XD_DISABLE                (1ULL << 34)
 
@@ -385,7 +387,8 @@
 #define MSR_IA32_MISC_ENABLE_SPLIT_LOCK_DISABLE        (1ULL << 4)
 #define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE   (1ULL << 6)
 #define MSR_IA32_MISC_ENABLE_SUPPRESS_LOCK     (1ULL << 8)
-#define MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE  (1ULL << 9)
+#define MSR_BIT_PRF_DIS                                9
+#define MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE  (1ULL << MSR_BIT_PRF_DIS)
 #define MSR_IA32_MISC_ENABLE_FERR              (1ULL << 10)
 #define MSR_IA32_MISC_ENABLE_FERR_MULTIPLEX    (1ULL << 10)
 #define MSR_IA32_MISC_ENABLE_TM2               (1ULL << 13)