kvm: better MWAIT emulation for guests

[karo-tx-linux.git] / arch / x86 / kvm / x86.h

diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
index e8ff3e4ce38a53e167bc475f0d2b91b5fd9065b3..6120670749055ddb43174c606d3d5eceaf41ecd6 100644 (file)
--- a/arch/x86/kvm/x86.h
+++ b/arch/x86/kvm/x86.h
@@ -1,6 +1,8 @@
 #ifndef ARCH_X86_KVM_X86_H
 #define ARCH_X86_KVM_X86_H
 
+#include <asm/processor.h>
+#include <asm/mwait.h>
 #include <linux/kvm_host.h>
 #include <asm/pvclock.h>
 #include "kvm_cache_regs.h"
@@ -212,4 +214,38 @@ static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
            __rem;                                              \
         })
 
+static inline bool kvm_mwait_in_guest(void)
+{
+       unsigned int eax, ebx, ecx, edx;
+
+       if (!cpu_has(&boot_cpu_data, X86_FEATURE_MWAIT))
+               return false;
+
+       switch (boot_cpu_data.x86_vendor) {
+       case X86_VENDOR_AMD:
+               /* All AMD CPUs have a working MWAIT implementation */
+               return true;
+       case X86_VENDOR_INTEL:
+               /* Handle Intel below */
+               break;
+       default:
+               return false;
+       }
+
+       /*
+        * Intel CPUs without CPUID5_ECX_INTERRUPT_BREAK are problematic as
+        * they would allow guest to stop the CPU completely by disabling
+        * interrupts then invoking MWAIT.
+        */
+       if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
+               return false;
+
+       cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
+
+       if (!(ecx & CPUID5_ECX_INTERRUPT_BREAK))
+               return false;
+
+       return true;
+}
+
 #endif