ARM: don't probe PHY address for LaCie boards

[karo-tx-uboot.git] / board / LaCie / common / common.c

diff --git a/board/LaCie/common/common.c b/board/LaCie/common/common.c
index dc5350dc281219babe1b0c16fcda4181645379f1..78d0edc66d8384ac4a44a25bd8d6d2cfd0976a1e 100644 (file)
--- a/board/LaCie/common/common.c
+++ b/board/LaCie/common/common.c
@@ -20,34 +20,25 @@
 #define MV88E1116_RGMII_TXTM_CTRL      (1 << 4)
 #define MV88E1116_RGMII_RXTM_CTRL      (1 << 5)
 
-void mv_phy_88e1116_init(const char *name)
+void mv_phy_88e1116_init(const char *name, u16 phyaddr)
 {
        u16 reg;
-       u16 devadr;
 
        if (miiphy_set_current_dev(name))
                return;
 
-       /* command to read PHY dev address */
-       if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
-               printf("Err..(%s) could not read PHY dev address\n", __func__);
-               return;
-       }
-
        /*
         * Enable RGMII delay on Tx and Rx for CPU port
         * Ref: sec 4.7.2 of chip datasheet
         */
-       miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
-       miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
+       miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
+       miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, &reg);
        reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
-       miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
-       miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
-
-       /* reset the phy */
-       miiphy_reset(name, devadr);
+       miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg);
+       miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
 
-       printf("88E1116 Initialized on %s\n", name);
+       if (miiphy_reset(name, phyaddr) == 0)
+               printf("88E1116 Initialized on %s\n", name);
 }
 #endif /* CONFIG_CMD_NET && CONFIG_RESET_PHY_R */