Add GPL-2.0+ SPDX-License-Identifier to source files

[karo-tx-uboot.git] / board / armltd / integrator / integrator.c

diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c
index 9bb56b520823903497408673c996c1ab3e94453c..62870c6f43d5cb3b249bbd13663c1f5b7bebffc0 100644 (file)
--- a/board/armltd/integrator/integrator.c
+++ b/board/armltd/integrator/integrator.c
@@ -14,27 +14,14 @@
  * ARM Ltd.
  * Philippe Robin, <philippe.robin@arm.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+ 
  */
 
 #include <common.h>
 #include <netdev.h>
+#include <asm/io.h>
+#include "arm-ebi.h"
+#include "integrator-sc.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -55,6 +42,8 @@ void show_boot_progress(int progress)
 
 int board_init (void)
 {
+       u32 val;
+
        /* arch number of Integrator Board */
 #ifdef CONFIG_ARCH_CINTEGRATOR
        gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
@@ -72,6 +61,37 @@ extern void cm_remap(void);
        cm_remap();     /* remaps writeable memory to 0x00000000 */
 #endif
 
+#ifdef CONFIG_ARCH_CINTEGRATOR
+       /*
+        * Flash protection on the Integrator/CP is in a simple register
+        */
+       val = readl(CP_FLASHPROG);
+       val |= (CP_FLASHPROG_FLVPPEN | CP_FLASHPROG_FLWREN);
+       writel(val, CP_FLASHPROG);
+#else
+       /*
+        * The Integrator/AP has some special protection mechanisms
+        * for the external memories, first the External Bus Interface (EBI)
+        * then the system controller (SC).
+        *
+        * The system comes up with the flash memory non-writable and
+        * configuration locked. If we want U-Boot to be used for flash
+        * access we cannot have the flash memory locked.
+        */
+       writel(EBI_UNLOCK_MAGIC, EBI_BASE + EBI_LOCK_REG);
+       val = readl(EBI_BASE + EBI_CSR1_REG);
+       val &= EBI_CSR_WREN_MASK;
+       val |= EBI_CSR_WREN_ENABLE;
+       writel(val, EBI_BASE + EBI_CSR1_REG);
+       writel(0, EBI_BASE + EBI_LOCK_REG);
+
+       /*
+        * Set up the system controller to remove write protection from
+        * the flash memory and enable Vpp
+        */
+       writel(SC_CTRL_FLASHVPP | SC_CTRL_FLASHWP, SC_CTRLS);
+#endif
+
        icache_enable ();
 
        return 0;
@@ -79,34 +99,34 @@ extern void cm_remap(void);
 
 int misc_init_r (void)
 {
-#ifdef CONFIG_PCI
-       pci_init();
-#endif
        setenv("verify", "n");
        return (0);
 }
 
-/******************************
- Routine:
- Description:
-******************************/
+/*
+ * The Integrator remaps the Flash memory to 0x00000000 and executes U-Boot
+ * from there, which means we cannot test the RAM underneath the ROM at this
+ * point. It will be unmapped later on, when we are executing from the
+ * relocated in RAM U-Boot. We simply assume that this RAM is usable if the
+ * RAM on higher addresses works fine.
+ */
+#define REMAPPED_FLASH_SZ 0x40000
+
 int dram_init (void)
 {
-       gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-       gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
-
+       gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 #ifdef CONFIG_CM_SPD_DETECT
        {
 extern void dram_query(void);
-       unsigned long cm_reg_sdram;
-       unsigned long sdram_shift;
+       u32 cm_reg_sdram;
+       u32 sdram_shift;
 
        dram_query();   /* Assembler accesses to CM registers */
                        /* Queries the SPD values             */
 
        /* Obtain the SDRAM size from the CM SDRAM register */
 
-       cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
+       cm_reg_sdram = readl(CM_BASE + OS_SDRAM);
        /*   Register         SDRAM size
         *
         *   0xXXXXXXbbb000bb    16 MB
@@ -116,11 +136,18 @@ extern void dram_query(void);
         *   0xXXXXXXbbb100bb   256 MB
         *
         */
-       sdram_shift              = ((cm_reg_sdram & 0x0000001C)/4)%4;
-       gd->bd->bi_dram[0].size  = 0x01000000 << sdram_shift;
-
+       sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
+       gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE +
+                                   REMAPPED_FLASH_SZ,
+                                   0x01000000 << sdram_shift);
        }
+#else
+       gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE +
+                                   REMAPPED_FLASH_SZ,
+                                   PHYS_SDRAM_1_SIZE);
 #endif /* CM_SPD_DETECT */
+       /* We only have one bank of RAM, set it to whatever was detected */
+       gd->bd->bi_dram[0].size  = gd->ram_size;
 
        return 0;
 }