rename CFG_ macros to CONFIG_SYS

[karo-tx-uboot.git] / board / atmel / at91cap9adk / nand.c

diff --git a/board/atmel/at91cap9adk/nand.c b/board/atmel/at91cap9adk/nand.c
index 2f02126278410283c07f783e912ca2669a7652d7..cc2263b023a3e383ed18c75f79dd13a7b869ef2d 100644 (file)
--- a/board/atmel/at91cap9adk/nand.c
+++ b/board/atmel/at91cap9adk/nand.c
@@ -1,6 +1,6 @@
 /*
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
  * Lead Tech Design <www.leadtechdesign.com>
  *
  * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
@@ -25,9 +25,9 @@
  */
 
 #include <common.h>
-#include <asm/arch/hardware.h>
-
-#ifdef CONFIG_CMD_NAND
+#include <asm/arch/at91cap9.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91_pio.h>
 
 #include <nand.h>
 
@@ -37,35 +37,36 @@
 #define        MASK_ALE        (1 << 21)       /* our ALE is AD21 */
 #define        MASK_CLE        (1 << 22)       /* our CLE is AD22 */
 
-static void at91cap9adk_nand_hwcontrol(struct mtd_info *mtd, int cmd)
+static void at91cap9adk_nand_hwcontrol(struct mtd_info *mtd,
+                                      int cmd, unsigned int ctrl)
 {
        struct nand_chip *this = mtd->priv;
-       ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
 
-       IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
-       switch (cmd) {
-       case NAND_CTL_SETCLE:
-               IO_ADDR_W |= MASK_CLE;
-               break;
-       case NAND_CTL_SETALE:
-               IO_ADDR_W |= MASK_ALE;
-               break;
-       case NAND_CTL_CLRNCE:
-               AT91C_BASE_PIOD->PIO_SODR = AT91C_PIO_PD15;
-               break;
-       case NAND_CTL_SETNCE:
-               AT91C_BASE_PIOD->PIO_CODR = AT91C_PIO_PD15;
-               break;
+       if (ctrl & NAND_CTRL_CHANGE) {
+               ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
+               IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
+
+               if (ctrl & NAND_CLE)
+                       IO_ADDR_W |= MASK_CLE;
+               if (ctrl & NAND_ALE)
+                       IO_ADDR_W |= MASK_ALE;
+
+               at91_set_gpio_value(AT91_PIN_PD15, !(ctrl & NAND_NCE));
+               this->IO_ADDR_W = (void *) IO_ADDR_W;
        }
-       this->IO_ADDR_W = (void *) IO_ADDR_W;
+
+       if (cmd != NAND_CMD_NONE)
+               writeb(cmd, this->IO_ADDR_W);
 }
 
 int board_nand_init(struct nand_chip *nand)
 {
-       nand->eccmode = NAND_ECC_SOFT;
-       nand->hwcontrol = at91cap9adk_nand_hwcontrol;
+       nand->ecc.mode = NAND_ECC_SOFT;
+#ifdef CONFIG_SYS_NAND_DBW_16
+       nand->options = NAND_BUSWIDTH_16;
+#endif
+       nand->cmd_ctrl = at91cap9adk_nand_hwcontrol;
        nand->chip_delay = 20;
 
        return 0;
 }
-#endif