Merge branch 'next' of ../next

[karo-tx-uboot.git] / board / csb472 / csb472.c

diff --git a/board/csb472/csb472.c b/board/csb472/csb472.c
index 833bbce923d90859f818d76fefcc1b985a82fad6..25709f2a4307bc627cd590626c3f1e713eebb569 100644 (file)
--- a/board/csb472/csb472.c
+++ b/board/csb472/csb472.c
@@ -25,7 +25,9 @@
 #include <asm/processor.h>
 #include <i2c.h>
 #include <miiphy.h>
-#include <ppc4xx_enet.h>
+#include <asm/ppc4xx-emac.h>
+
+void sdram_init(void);
 
 /*
  * board_early_init_f: do early board initialization
@@ -53,15 +55,15 @@ int board_early_init_f(void)
    |
    +-------------------------------------------------------------------------*/
 
-       mtdcr (uicsr, 0xFFFFFFFF);   /* clear all ints */
-       mtdcr (uicer, 0x00000000);   /* disable all ints */
-       mtdcr (uiccr, 0x00000000);   /* set all to be non-critical */
-       mtdcr (uicpr, 0xFFFFFF83);   /* set int polarities */
-       mtdcr (uictr, 0x10000000);   /* set int trigger levels */
-       mtdcr (uicvcr, 0x00000001);  /* set vect base=0,INT0 highest priority */
-       mtdcr (uicsr, 0xFFFFFFFF);   /* clear all ints */
+       mtdcr (UIC0SR, 0xFFFFFFFF);   /* clear all ints */
+       mtdcr (UIC0ER, 0x00000000);   /* disable all ints */
+       mtdcr (UIC0CR, 0x00000000);   /* set all to be non-critical */
+       mtdcr (UIC0PR, 0xFFFFFF83);   /* set int polarities */
+       mtdcr (UIC0TR, 0x10000000);   /* set int trigger levels */
+       mtdcr (UIC0VCR, 0x00000001);  /* set vect base=0,INT0 highest priority */
+       mtdcr (UIC0SR, 0xFFFFFFFF);   /* clear all ints */
 
-       mtebc (epcr, 0xa8400000);   /* EBC always driven */
+       mtebc (EBC0_CFG, 0xa8400000);   /* EBC always driven */
 
        return 0; /* success */
 }
@@ -86,37 +88,44 @@ int checkboard(void)
  * configured by initialization code
  *
  */
-long initdram (int board_type)
+phys_size_t initdram (int board_type)
 {
        ulong tot_size;
        ulong bank_size;
        ulong tmp;
 
+       /*
+        * ToDo: Move the asm init routine sdram_init() to this C file,
+        * or even better use some common ppc4xx code available
+        * in arch/powerpc/cpu/ppc4xx
+        */
+       sdram_init();
+
        tot_size = 0;
 
-       mtdcr (memcfga, mem_mb0cf);
-       tmp = mfdcr (memcfgd);
+       mtdcr (SDRAM0_CFGADDR, SDRAM0_B0CR);
+       tmp = mfdcr (SDRAM0_CFGDATA);
        if (tmp & 0x00000001) {
                bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
                tot_size += bank_size;
        }
 
-       mtdcr (memcfga, mem_mb1cf);
-       tmp = mfdcr (memcfgd);
+       mtdcr (SDRAM0_CFGADDR, SDRAM0_B1CR);
+       tmp = mfdcr (SDRAM0_CFGDATA);
        if (tmp & 0x00000001) {
                bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
                tot_size += bank_size;
        }
 
-       mtdcr (memcfga, mem_mb2cf);
-       tmp = mfdcr (memcfgd);
+       mtdcr (SDRAM0_CFGADDR, SDRAM0_B2CR);
+       tmp = mfdcr (SDRAM0_CFGDATA);
        if (tmp & 0x00000001) {
                bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
                tot_size += bank_size;
        }
 
-       mtdcr (memcfga, mem_mb3cf);
-       tmp = mfdcr (memcfgd);
+       mtdcr (SDRAM0_CFGADDR, SDRAM0_B3CR);
+       tmp = mfdcr (SDRAM0_CFGDATA);
        if (tmp & 0x00000001) {
                bank_size = 0x00400000 << ((tmp >> 17) & 0x7);
                tot_size += bank_size;