--- /dev/null
+/*
+ * (C) Copyright 2003
+ * EMK Elektronik GmbH <www.emk-elektronik.de>
+ * Reinhard Meyer <r.meyer@emk-elektronik.de>
+ *
+ * Board specific routines for the TOP860
+ *
+ * - initialisation
+ * - interface to VPD data (mac address, clock speeds)
+ * - memory controller
+ * - serial io initialisation
+ * - ethernet io initialisation
+ *
+ * -----------------------------------------------------------------
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <commproc.h>
+#include <mpc8xx.h>
+
+/*****************************************************************************\r
+ * UPM table for 60ns EDO RAM at 25 MHz bus/external clock\r
+ *****************************************************************************/\r
+static const uint edo_60ns_25MHz_tbl[] = {
+\r
+/* single read (offset 0x00 in upm ram) */\r
+ 0x0ff3fc04,0x08f3fc04,0x00f3fc04,0x00f3fc00,\r
+ 0x33f7fc07,0xfffffc05,0xfffffc05,0xfffffc05,\r
+/* burst read (offset 0x08 in upm ram) */\r
+ 0x0ff3fc04,0x08f3fc04,0x00f3fc0c,0x0ff3fc40,\r
+ 0x0cf3fc04,0x03f3fc48,0x0cf3fc04,0x03f3fc48,\r
+ 0x0cf3fc04,0x03f3fc00,0x3ff7fc07,0xfffffc05,\r
+ 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,\r
+/* single write (offset 0x18 in upm ram) */\r
+ 0x0ffffc04,0x08fffc04,0x30fffc00,0xf1fffc07,\r
+ 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,\r
+/* burst write (offset 0x20 in upm ram) */\r
+ 0x0ffffc04,0x08fffc00,0x00fffc04,0x03fffc4c,\r
+ 0x00fffc00,0x07fffc4c,0x00fffc00,0x0ffffc4c,\r
+ 0x00fffc00,0x3ffffc07,0xfffffc05,0xfffffc05,\r
+ 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,\r
+/* refresh (offset 0x30 in upm ram) */\r
+ 0xc0fffc04,0x07fffc04,0x0ffffc04,0x0ffffc04,\r
+ 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,\r
+ 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,\r
+/* exception (offset 0x3C in upm ram) */\r
+ 0xfffffc07,0xfffffc03,0xfffffc05,0xfffffc05,\r
+};
+
+/*****************************************************************************\r
+ * Print Board Identity\r
+ *****************************************************************************/\r
+int checkboard (void)
+{
+ puts ("Board:"CONFIG_IDENT_STRING"\n");
+ return (0);
+}
+
+/*****************************************************************************\r
+ * Initialize DRAM controller\r
+ *****************************************************************************/\r
+long int initdram (int board_type)
+{
+ volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile memctl8xx_t *memctl = &immap->im_memctl;
+
+ /*
+ * Only initialize memory controller when running from FLASH.
+ * When running from RAM, don't touch it.
+ */
+ if ((ulong) initdram & 0xff000000)\r
+ {\r
+ volatile uint *addr1, *addr2;\r
+ uint i, j;\r
+
+ upmconfig (UPMA, (uint *) edo_60ns_25MHz_tbl,\r
+ sizeof (edo_60ns_25MHz_tbl) / sizeof (uint));
+ memctl->memc_mptpr = 0x0200;
+ memctl->memc_mamr = 0x0ca20330;
+ memctl->memc_or2 = -CFG_DRAM_MAX | OR_CSNT_SAM;
+ memctl->memc_br2 = CFG_DRAM_BASE | BR_MS_UPMA | BR_V;
+ /*\r
+ * Do 8 read accesses to DRAM\r
+ */\r
+ addr1 = (volatile uint*) 0;\r
+ addr2 = (volatile uint*) 0x00400000;\r
+ for (i=0, j=0; i<8; i++)\r
+ j = addr1[0];\r
+ \r
+ /*\r
+ * Now check whether we got 4MB or 16MB populated\r
+ */\r
+ addr1[0] = 0x12345678;\r
+ addr1[1] = 0x9abcdef0;\r
+ addr2[0] = 0xfeedc0de;\r
+ addr2[1] = 0x47110815;\r
+ if (addr1[0] == 0xfeedc0de && addr1[1] == 0x47110815)\r
+ {\r
+ /* only 4MB populated */\r
+ memctl->memc_or2 = -(CFG_DRAM_MAX/4) | OR_CSNT_SAM;\r
+ }\r
+ }\r
+\r
+ return -(memctl->memc_or2 & 0xffff0000);
+}
+\r
+/*****************************************************************************\r
+ * otherinits after RAM is there and we are relocated to RAM\r
+ * note: though this is an int function, nobody cares for the result!\r
+ *****************************************************************************/\r
+int misc_init_r (void)
+{\r
+ /* read 'factory' part of EEPROM */\r
+ uchar buf[81];\r
+ uchar *p;\r
+ uint length;\r
+ uint addr;\r
+ uint len;\r
+\r
+ /* get length first */\r
+ addr = CFG_FACT_OFFSET;\r
+ if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, 2))\r
+ {\r
+bailout:\r
+ printf ("cannot read factory configuration\n");\r
+ printf ("be sure to set ethaddr yourself!\n");\r
+ return 0;\r
+ }
+ length = buf[0] + (buf[1]<<8);\r
+ addr += 2;\r
+\r
+ /* sanity check */\r
+ if (length < 20 || length > CFG_FACT_SIZE-2)\r
+ goto bailout;\r
+\r
+ /* read lines */\r
+ while (length > 0)\r
+ {\r
+ /* read one line */\r
+ len = length > 80 ? 80 : length;\r
+ if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, len))\r
+ goto bailout;\r
+ /* mark end of buffer */\r
+ buf[len] = 0;\r
+ /* search end of line */\r
+ for (p=buf; *p && *p != 0x0a; p++) ;\r
+ if (!*p)\r
+ goto bailout;\r
+ *p++ = 0;\r
+ /* advance to next line start */\r
+ length -= p-buf;\r
+ addr += p-buf;\r
+ /*printf ("%s\n", buf);*/\r
+ /* search for our specific entry */\r
+ if (!strncmp ((char *)buf, "[RLA/lan/Ethernet] ", 19))\r
+ {\r
+ setenv ("ethaddr", buf+19);
+ } \r
+ else if (!strncmp ((char *)buf, "[BOARD/SERIAL] ", 15))\r
+ {\r
+ setenv ("serial#", buf+15);
+ } \r
+ else if (!strncmp ((char *)buf, "[BOARD/TYPE] ", 13))\r
+ {\r
+ setenv ("board_id", buf+13);
+ } \r
+ }\r
+ return (0);
+}
+