ppc4xx: Big cleanup of PPC4xx defines

[karo-tx-uboot.git] / board / esd / du405 / du405.c

diff --git a/board/esd/du405/du405.c b/board/esd/du405/du405.c
index 8a87d5549ee0cc17a82ac687b1ceca203524af0b..28a50c7b0e77286ece1810eda7e40d3b51c0ebce 100644 (file)
--- a/board/esd/du405/du405.c
+++ b/board/esd/du405/du405.c
@@ -135,7 +135,7 @@ int board_early_init_f (void)
        /*
         * EBC Configuration Register: set ready timeout to 100 us
         */
-       mtebc (epcr, 0xb8400000);
+       mtebc (EBC0_CFG, 0xb8400000);
 
        return 0;
 }
@@ -143,13 +143,13 @@ int board_early_init_f (void)
 
 int misc_init_r (void)
 {
-       unsigned long cntrl0Reg;
+       unsigned long CPC0_CR0Reg;
 
        /*
         * Setup UART1 handshaking: use CTS instead of DSR
         */
-       cntrl0Reg = mfdcr(cntrl0);
-       mtdcr(cntrl0, cntrl0Reg | 0x00001000);
+       CPC0_CR0Reg = mfdcr(CPC0_CR0);
+       mtdcr(CPC0_CR0, CPC0_CR0Reg | 0x00001000);
 
        return (0);
 }
@@ -188,13 +188,19 @@ int checkboard (void)
        /*
         * Reset external DUART via FPGA
         */
-       *(volatile unsigned char *) FPGA_MODE_REG = 0xff;       /* reset high active */
-       *(volatile unsigned char *) FPGA_MODE_REG = 0x00;       /* low again */
+       out_8((void *)FPGA_MODE_REG, 0xff); /* reset high active */
+       out_8((void *)FPGA_MODE_REG, 0x00); /* low again */
+
+       return 0;
+}
+
+void reset_phy(void)
+{
+#if defined(CONFIG_LXT971_NO_SLEEP)
 
        /*
         * Disable sleep mode in LXT971
         */
        lxt971_no_sleep();
-
-       return 0;
+#endif
 }