Merge branch 'u-boot/master' into 'u-boot-arm/master'

[karo-tx-uboot.git] / board / freescale / bsc9132qds / bsc9132qds.c

diff --git a/board/freescale/bsc9132qds/bsc9132qds.c b/board/freescale/bsc9132qds/bsc9132qds.c
index bcac5c1ddb42dbeb7f7ec97f02720dbba43e2671..9377280063e07eed30769a74912b9b0a9949d266 100644 (file)
--- a/board/freescale/bsc9132qds/bsc9132qds.c
+++ b/board/freescale/bsc9132qds/bsc9132qds.c
@@ -1,23 +1,7 @@
 /*
  * Copyright 2013 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -33,10 +17,10 @@
 #include <tsec.h>
 #include <mmc.h>
 #include <netdev.h>
-#include <asm/fsl_ifc.h>
+#include <fsl_ifc.h>
 #include <hwconfig.h>
 #include <i2c.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 
 #ifdef CONFIG_PCI
 #include <pci.h>
@@ -141,6 +125,27 @@ void board_config_serdes_mux(void)
        }
 }
 
+/* Configure DSP DDR controller */
+void dsp_ddr_configure(void)
+{
+       /*
+        *There are separate DDR-controllers for DSP and PowerPC side DDR.
+        *copy the ddr controller settings from PowerPC side DDR controller
+        *to the DSP DDR controller as connected DDR memories are similar.
+        */
+       struct ccsr_ddr __iomem *pa_ddr =
+                       (struct ccsr_ddr __iomem *)CONFIG_SYS_FSL_DDR_ADDR;
+       struct ccsr_ddr temp_ddr;
+       struct ccsr_ddr __iomem *dsp_ddr =
+                       (struct ccsr_ddr __iomem *)CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR;
+
+       memcpy(&temp_ddr, pa_ddr, sizeof(struct ccsr_ddr));
+       temp_ddr.cs0_bnds = CONFIG_SYS_DDR1_CS0_BNDS;
+       temp_ddr.sdram_cfg &= ~SDRAM_CFG_MEM_EN;
+       memcpy(dsp_ddr, &temp_ddr, sizeof(struct ccsr_ddr));
+       dsp_ddr->sdram_cfg |= SDRAM_CFG_MEM_EN;
+}
+
 int board_early_init_r(void)
 {
 #ifndef CONFIG_SYS_NO_FLASH
@@ -169,6 +174,7 @@ int board_early_init_r(void)
                        0, flash_esel+1, BOOKE_PAGESZ_64M, 1);
 #endif
        board_config_serdes_mux();
+       dsp_ddr_configure();
        return 0;
 }
 
@@ -184,7 +190,7 @@ int checkboard(void)
        struct cpu_type *cpu;
        u8 sw;
 
-       cpu = gd->cpu;
+       cpu = gd->arch.cpu;
        printf("Board: %sQDS\n", cpu->name);
 
        printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x,\n",
@@ -258,7 +264,7 @@ int misc_init_r(void)
        u8 val;
        ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
        u32 porbmsr = in_be32(&gur->porbmsr);
-       u32 romloc = (porbmsr >> MPC85XX_PORBMSR_ROMLOC_SHIFT) & 0xf;
+       u32 romloc = (porbmsr >> MPC85xx_PORBMSR_ROMLOC_SHIFT) & 0xf;
 
        /*Configure 1588 clock-in source from RF Card*/
        val = QIXIS_READ_I2C(brdcfg[5]);
@@ -360,7 +366,7 @@ void ft_board_setup(void *blob, bd_t *bd)
 
        ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
        u32 porbmsr = in_be32(&gur->porbmsr);
-       u32 romloc = (porbmsr >> MPC85XX_PORBMSR_ROMLOC_SHIFT) & 0xf;
+       u32 romloc = (porbmsr >> MPC85xx_PORBMSR_ROMLOC_SHIFT) & 0xf;
 
        if (!(hwconfig("uart2") && hwconfig("usb1"))) {
                /* If uart2 is there in hwconfig remove usb node from