mpc8xx: remove unused linker script

[karo-tx-uboot.git] / board / freescale / mpc7448hpc2 / asm_init.S

diff --git a/board/freescale/mpc7448hpc2/asm_init.S b/board/freescale/mpc7448hpc2/asm_init.S
index a7a40a134c76fe7a2060bec341aba9558d9e8289..70315c31e456cf370b2262c2132a621b5850b8dd 100644 (file)
--- a/board/freescale/mpc7448hpc2/asm_init.S
+++ b/board/freescale/mpc7448hpc2/asm_init.S
@@ -5,20 +5,7 @@
  * Copyright (c) 2005 Freescale Semiconductor, Inc.
  * Maintainer tie-fei.zang@freescale.com
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -123,7 +110,7 @@ board_asm_init:
 
 /* Initialize pointer to Tsi108 register space */
 
-       LOAD_PTR(r29,CFG_TSI108_CSR_RST_BASE)/* r29 - pointer to tsi108 CSR space */
+       LOAD_PTR(r29,CONFIG_SYS_TSI108_CSR_RST_BASE)/* r29 - pointer to tsi108 CSR space */
        ori r4,r29,TSI108_PB_REG_OFFSET
 
 /* Check Processor Version Number */
@@ -214,12 +201,12 @@ do_tsi108_init:
 
        ori r4,r29,TSI108_PB_REG_OFFSET
 
-#if (CFG_TSI108_CSR_BASE != CFG_TSI108_CSR_RST_BASE)
+#if (CONFIG_SYS_TSI108_CSR_BASE != CONFIG_SYS_TSI108_CSR_RST_BASE)
        /* Relocate (if required) Tsi108 registers. Set new value for
         * PB_REG_BAR:
         * Note we are in the 32-bit address mode.
         */
-       LOAD_U32(r5,(CFG_TSI108_CSR_BASE | 0x01)) /* PB_REG_BAR: BA + EN */
+       LOAD_U32(r5,(CONFIG_SYS_TSI108_CSR_BASE | 0x01)) /* PB_REG_BAR: BA + EN */
        stw     r5,PB_REG_BAR(r4)
        andis.  r29,r5,0xFFFF
        sync
@@ -415,7 +402,7 @@ set_default_values:
 #ifdef SDC_AUTOPRECH_EN
        oris    r5,r5,0x0001            /* set auto precharge EN bit */
 #endif
-       stw     r5,SD_D0_CTRL(r4)
+       stw     r5,SD_D0_CTRL(r4)
        LOAD_U32(r5,VAL_SD_D0_BAR)
        stw     r5,SD_D0_BAR(r4)
        sync