/*
* Copyright 2009, 2011 Freescale Semiconductor, Inc.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
struct cpu_type *cpu;
ulong ddr_freq, ddr_freq_mhz;
- cpu = gd->cpu;
+ cpu = gd->arch.cpu;
/* P1020 and it's derivatives support max 32bit DDR width */
if (cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1011) {
ddr_size = (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 / 2);
ddr_cfg_regs.cs[0].bnds = 0x0000001F;
}
- fsl_ddr_set_memctl_regs(&ddr_cfg_regs, 0);
+ fsl_ddr_set_memctl_regs(&ddr_cfg_regs, 0, 0);
set_ddr_laws(0, ddr_size, LAW_TRGT_IF_DDR_1);
return ddr_size;