x86: chromebook_link: Implement CAR support (cache as RAM)

[karo-tx-uboot.git] / board / google / chromebook_link / Kconfig

diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig
index 9c715ba765a13fc340d313292d5f956fe16f97dc..3a4f557d309e2486cd059af97c4a38de41eb0e21 100644 (file)
--- a/board/google/chromebook_link/Kconfig
+++ b/board/google/chromebook_link/Kconfig
@@ -12,6 +12,18 @@ config SYS_SOC
 config SYS_CONFIG_NAME
        default "chromebook_link"
 
+config BOARD_SPECIFIC_OPTIONS # dummy
+       def_bool y
+       select CPU_INTEL_SOCKET_RPGA989
+       select NORTHBRIDGE_INTEL_IVYBRIDGE
+       select SOUTHBRIDGE_INTEL_C216
+       select HAVE_ACPI_RESUME
+       select MARK_GRAPHICS_MEM_WRCOMB
+
+config MMCONF_BASE_ADDRESS
+       hex
+       default 0xf0000000
+
 config EARLY_POST_CROS_EC
        bool "Enable early post to Chrome OS EC"
        default y