rename CFG_ macros to CONFIG_SYS

[karo-tx-uboot.git] / board / ixdp425 / ixdp425.c

diff --git a/board/ixdp425/ixdp425.c b/board/ixdp425/ixdp425.c
index 1b34f96027f3e1ec8c17f78aa2a38f23c4a3a54e..43ac8f6a42a6e9aa5e5ae6f9154d98887cb360b3 100644 (file)
--- a/board/ixdp425/ixdp425.c
+++ b/board/ixdp425/ixdp425.c
@@ -1,4 +1,7 @@
 /*
+ * (C) Copyright 2006
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
  * (C) Copyright 2002
  * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  *
@@ -25,52 +28,99 @@
  * MA 02111-1307 USA
  */
 
-#include <asm/arch/ixp425.h>
 #include <common.h>
+#include <command.h>
+#include <malloc.h>
+#include <netdev.h>
+#include <asm/arch/ixp425.h>
 
-/* ------------------------------------------------------------------------- */
-
-
-/* local prototypes */
-
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Miscelaneous platform dependent initialisations
  */
-
-int
-/**********************************************************/
-board_late_init (void)
-/**********************************************************/
+int board_init (void)
 {
-       return (0);
-}
-
-int
-/**********************************************************/
-board_init (void)
-/**********************************************************/
-{
-       DECLARE_GLOBAL_DATA_PTR;
-
        /* arch number of IXDP */
-       gd->bd->bi_arch_number = 245;
+       gd->bd->bi_arch_number = MACH_TYPE_IXDP425;
 
        /* adress of boot parameters */
        gd->bd->bi_boot_params = 0x00000100;
 
+#ifdef CONFIG_IXDPG425
+       /* arch number of IXDP */
+       gd->bd->bi_arch_number = MACH_TYPE_IXDPG425;
+
+       /*
+        * Get realtek RTL8305 switch and SLIC out of reset
+        */
+       GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SWITCH_RESET_N);
+       GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SWITCH_RESET_N);
+       GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SLIC_RESET_N);
+       GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SLIC_RESET_N);
+
+       /*
+        * Setup GPIO's for PCI INTA & INTB
+        */
+       GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA_N);
+       GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA_N);
+       GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB_N);
+       GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB_N);
+
+       /*
+        * Setup GPIO's for 33MHz clock output
+        */
+       *IXP425_GPIO_GPCLKR = 0x01FF01FF;
+       GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
+       GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
+#endif
+
        return 0;
 }
 
-int
-/**********************************************************/
-dram_init (void)
-/**********************************************************/
+/*
+ * Check Board Identity
+ */
+int checkboard(void)
 {
-       DECLARE_GLOBAL_DATA_PTR;
+       char *s = getenv("serial#");
+
+#ifdef CONFIG_IXDPG425
+       puts("Board: IXDPG425 - Intel Network Gateway Reference Platform");
+#else
+       puts("Board: IXDP425 - Intel Development Platform");
+#endif
+
+       if (s != NULL) {
+               puts(", serial# ");
+               puts(s);
+       }
+       putc('\n');
 
+       return (0);
+}
+
+int dram_init (void)
+{
        gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
        gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
 
        return (0);
 }
+
+#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
+extern struct pci_controller hose;
+extern void pci_ixp_init(struct pci_controller * hose);
+
+void pci_init_board(void)
+{
+       extern void pci_ixp_init (struct pci_controller *hose);
+
+       pci_ixp_init(&hose);
+}
+#endif
+
+int board_eth_init(bd_t *bis)
+{
+       return pci_eth_init(bis);
+}